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Design Languages >> Verilog-AMS >> verilogA: Connecting different regulator on same node.
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Message started by fabian on May 11^th, 2012, 1:32am

Title: verilogA: Connecting different regulator on same node.
Post by fabian on May 11^th, 2012, 1:32am

Hi All,

I do not know if I am using the right methodology at the moment to model in verilogA a complex regulator built with Series and Shunt regulators. My view is to develop a verilogA model for each of them.

Following this method, I need to have a high impedance out model for the disable regulators.

So I have defined an internal regulated signal,
electrical int_out, out;
inout out;

V(int_out, gnd) <+ slew(vout,5e6);

and I am defining the output impedance such as
if (reg_en)
res=1m;
else
res=1G;
V(int_out,out) <+ I(int_out,out) * transition(res,0,1u); (line 63)

When I run the simulation I got the following message:
"... near line 63: Encountered illegal use of both the potential and the flow of a pure probe branch (supply_gnd). Use either the potential or the flow of a pure probe branch, but not both."

Does someone see an obvious error on this code?
I am using this modelling for switch and it works fine?

Best regards,
Fabian

Title: Re: verilogA: Connecting different regulator on same node.
Post by Geoffrey_Coram on May 11^th, 2012, 8:02am

Your error message talks about "supply_gnd" but I don't see that it in the code snippets you posted.

Title: Re: verilogA: Connecting different regulator on same node.
Post by fabian on May 11^th, 2012, 9:14am

Thanks for your reply. Here is the code and I hope it is less snippet.

What I am not getting is that I would like to use the modelling of a switch for the branch b_supply but does not allow me to use I(b_supply) in function of v(b_supply)?

Could you recommand me a solution?

Fabian

Code:

`include "constants.vams"
`include "disciplines.vams"

module shunt_reg(supply, enable, gnd);
inout supply;
electrical supply;
input enable, gnd;
electrical enable, gnd;

parameter real param_vth = 500m;
parameter real param_vreg_snk = 1.8;
parameter real param_vmin = 1u;

real loadres, vout, res_supply;
integer reg_en;
electrical int_supply;

branch (int_supply, supply) b_supply;

analog begin

reg_en = (V(enable, gnd) > param_vth);

// Model the shunt regulator.
loadres = (I(supply, gnd)==0) ? 1 : -1 * (V(supply, gnd)/I(supply, gnd));
loadres = transition(loadres, 0, 1u);

if (loadres >= 0)
begin
vout = param_vmin;
end
else
begin
if (reg_en)
vout = param_vreg_snk;
else
vout = param_vmin;
end

V(int_supply, gnd) <+ slew(vout,5e2);

if (reg_en)
res_supply = 1m;
else
res_supply = 1G;

V(b_supply) <+ I(b_supply) * transition(res_supply,0,1u);

end
endmodule

The error message is:
Error found by spectre during AHDL read-in. ERROR (VACOMP-2077): "...shunt_reg/veriloga/veriloga.va", near line 49: Encountered illegal use of both the potential and the flow of a pure probe branch (supply_gnd). Use either the potential or the flow of a pure probe branch, but not both. ERROR (VACOMP-1816): Exiting AHDL compilation. ERROR (SFE-91): Error when elaborating the instance shunt_reg. Simulation should be terminated.

Title: Re: verilogA: Connecting different regulator on same node.
Post by Geoffrey_Coram on May 14^th, 2012, 5:28am

If I combine these two lines:
V(int_supply, gnd) <+ slew(vout,5e2);
V(b_supply) <+ I(b_supply) * transition(res_supply,0,1u);
where b_supply is the branch between int_supply and supply, then you've (indirectly) specified the voltage between supply and gnd.

This line:
loadres = (I(supply, gnd)==0) ? 1 : -1 * (V(supply, gnd)/I(supply, gnd));

is probing both the voltage and current in that branch, without specifying any constraint on them from within the model. Typically, if you want to measure a current, you are measuring the current through a short -- and then it doesn't make sense to be simultaneously measuring the voltage.

Also, on the next line:
loadres = transition(loadres, 0, 1u);
you're mis-applying the transition function to a continuous waveform.

I don't know what the "loadres" is supposed to be doing, but you need a different way to figure it out.