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Design >> Analog Design >> inverter delay
https://designers-guide.org/forum/YaBB.pl?num=1338799971

Message started by raja.cedt on Jun 4^th, 2012, 1:52am

Title: inverter delay
Post by raja.cedt on Jun 4^th, 2012, 1:52am

hello all,
can any one please tel me how inverter delay can controlled.... Basically delay is charging rate, so either I has to increase current or capacitance has to decrease.

1. So in-principle increasing size should n't change the delay (neglect parasitic cap) due to increase in I and Cap simultaneously. is this correct???

2. What about current steering...this will increase current without increasing the cap, so what is the bottle neck here????

3. Is there any way to get fine delay in a given technology?

Thanks,
raj.

Thanks,
Raj.

Title: Re: inverter delay
Post by boe on Jun 5^th, 2012, 11:48am

Hi Raj,
raja.cedt wrote on Jun 4^th, 2012, 1:52am:

...
1. So in-principle increasing size should n't change the delay (neglect parasitic cap) due to increase in I and Cap simultaneously. is this correct???

For a given load, increasing the driver size reduces the delay.. Note that parasitics are often dominant here (if you drive long lines).
- B O E

Title: Re: inverter delay
Post by aaron_do on Jun 5^th, 2012, 5:50pm

Hi,

if you want more delay, can't you just increase the gate length?

Aaron

Title: Re: inverter delay
Post by loose-electron on Jun 5^th, 2012, 9:48pm

what are you trying to do?
create a variable delay? Or what?

Title: Re: inverter delay
Post by Lex on Jun 6^th, 2012, 2:13am

You want a finely controlled delay. I'd say you'd need go digital to do so. Some controllable logic in which you can program the delay (e.g. via a set of flipflops) combined with an accurate clock is very process independent as well.

Title: Re: inverter delay
Post by RobG on Jun 6^th, 2012, 8:22am

Your belief that delay will be constant for the inverter sounds reasonable only if you don't include loading. Power supply and the slope of the driving voltage also affect timing. You obviously need bigger devices to drive a bigger load. A long time ago I found that the best speed/power tradeoff was with driving inverter 1/3 the size of the load gate. Not sure if that is still true.

If you limit the swing like is done with PECL you can get faster response at the expense of having static current.

Title: Re: inverter delay
Post by rfcooltools.com on Jun 7^th, 2012, 11:59am

Lowering or raising the supply will change the delay.

http://rfcooltools.com

Title: Re: inverter delay
Post by ywguo on Jun 8^th, 2012, 8:02am

Hi Raj,

What's your purpose of controlling the delay of inverters? You asked the way to get fine delay. How fine? <10ps or ??

Even on-chip microstrip lines are adopted to get very fine delay, like 10ps/step. Please refer the following paper.

Quote:

A 10 ps Resolution 1.6 ns Tuning Range CMOS Delay Line for Clock Deskewing in Data Recovery Systems
Gogaert, S.; Steyaert, M.
Solid-State Circuits Conference, 1995. ESSCIRC '95. Twenty-first European
Publication Year: 1995 , Page(s): 54 - 57

IEEE Conference Publications

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