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Design >> Analog Design >> High Resolution Comparator Design
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Message started by AnkurVerigy on Jun 5^th, 2012, 11:42am

Title: High Resolution Comparator Design
Post by AnkurVerigy on Jun 5^th, 2012, 11:42am

I want to design a high resolution comparator in 40nm CMOS technology (16 bit dynamic range, LSB=25uV) for my SAR ADC. can anyone share his/her experience here ? what is the right type of architecture for such designs ? speeds requirement is ~1Mhz