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Modeling >> Behavioral Models >> verilog to verilog-a conversion
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Message started by cristiano.azzolini on Jun 8th, 2012, 12:48am

Title: verilog to verilog-a conversion
Post by cristiano.azzolini on Jun 8th, 2012, 12:48am

Hi Guys,

do you know of any tool that converts verilog to verilog-a?
I understand that this is no more main stream flow as AMS simulators are largerly available but sometimes verilog-a is still needed due to legacy reasons.
Thanks in advance, cheers.
Cristiano

Title: Re: verilog to verilog-a conversion
Post by Geoffrey_Coram on Jun 14th, 2012, 5:39am

I think Lynguent has some sort of tool that can convert between different HDLs.  I've never used it, though, and I'm not sure it's what you're after.

When I read "Verilog" I think "digital Verilog" -- meaning gate-level descriptions (and, nand, nor, or, xor, xnor); do you really want something that replaces those event-driven gates with some sort of continuous-time representation?


Title: Re: verilog to verilog-a conversion
Post by cristiano.azzolini on Jun 17th, 2012, 1:47am

Hi Geoffrey,
thanks for the hint.
When I said Verilog I meant exactly digital verilog but "behavioral", not gate level.
Normally you would simulate the behavioral verilog along with analog spice netlits by using AMS sims.
For a number of reasons, in my case, having the behavioral digital verilog translated into analog verilog-a would help.
I will try to gather some info about Lynguent.

Cheers,
Cristiano

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