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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> Moved: how can i use asitic to simulate and design the PGS inductor on chip https://designers-guide.org/forum/YaBB.pl?num=1342577370 Message started by coolliu on Jul 17th, 2012, 7:09pm |
Title: Moved: how can i use asitic to simulate and design the PGS inductor on chip Post by coolliu on Jul 17th, 2012, 7:09pm This Topic has been moved to Physical Verification, Extraction and Analysis by Ken Kundert. |
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