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Design >> Analog Design >> Noise reduction in DC power supplies
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Message started by deepadc on Jul 26^th, 2012, 11:21am

Title: Noise reduction in DC power supplies
Post by deepadc on Jul 26^th, 2012, 11:21am

Working with a 14 bit pipeline ADC -10 MHz clock. The full scale Input in 4 V p-p diffential.
There is a lot of noise in the Vref for the ADC (from the power supplies-around 50mV swing).How can I reduce this noise?

Title: Re: Noise reduction in DC power supplies
Post by BackerShu on Jul 26^th, 2012, 4:41pm

It's really hard to say anything just from your description.

I guess the some basic questions would be
Where does this noise comes? what is the noise voltage profile, low frequency or high frequency? Is it from the PCB, assuming you are using PCB to test the ADC, or on chip?

How does it couples to the supply?

One more thing, is it really noise? Check the way you measure it to make sure what it is.

Hope this helps.