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Design >> Analog Design >> DCDC Buck Converter Device Capacitances Losses
https://designers-guide.org/forum/YaBB.pl?num=1346815974

Message started by qiushidaren on Sep 4^th, 2012, 8:32pm

Title: DCDC Buck Converter Device Capacitances Losses
Post by qiushidaren on Sep 4^th, 2012, 8:32pm

Hi folks,

I have been reading the second editon of the book "Fundamentals of Power Electronics", there is a place in the book confuses me so much, I guess maybe I need your help about it. On Page 98 there is Fig. 4.52 which is used to illustrate device capacitances, it says that "During the switching transitions these two capacitances are effectively in parallel, since the dc source Vg is effectively a short-circuit at high frequency. To the extent that the capacitances are linear, the energy lost when the MOSFET turns on is Wc=(1/2)(Cds+Cj)Vg^2."

First, what does the sentence "During the switching transitions these two capacitances are effectively in parallel, since the dc source Vg is effectively a short-circuit at high frequency." mean here, I don't know why he says that here. Second, I think Cj only has voltage when MOSFET is on, when MOSFET is turned off Cj is discharged, so it doesn't lose energy when the MOSFET turns on, so it's a contradiction to the saying in the book. Third, when the MOSFET turns on the charge stored on Cj should be discharged, but the charge goes to the load instead of ground, because the current direction of the diode in Fig. 4.52 is upward, so I think maybe Cj doesn't have loss.

Your explanation will be highly appreciated, thank you in advance.

Cheers,
Terry