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Simulators >> Circuit Simulators >> How to implement a transformer with center tap in cadence?
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Message started by yong_rfic on Sep 11^th, 2012, 8:53am

Title: How to implement a transformer with center tap in cadence?
Post by yong_rfic on Sep 11^th, 2012, 8:53am

Hi All,
Currently I am trying to build a Class B power amplifier with transformer as the output impedance transformation stage. The problem is I have to use a transformer with a center tap at its primary coil. But in Cadence, there is no such model. Can anyone suggest a way to build such a model on my own? Or can anyone show me some reference on how to build a practical and simulation-friendly on-chip transformer model in cadence?
Many thanks!

Title: Re: How to implement a transformer with center tap in cadence?
Post by aaron_do on Sep 11^th, 2012, 5:40pm

Hi,

analogLib has the components "ind" and "mind" which can be used to model inductors and coupling between inductors. You can start simple by assuming that each side (primary and secondary) consists of two inductors with a tapping point between them. Then you can add the k-factors between the primary and secondary, and between the two halves of the coils. Draw out how you think the transformer should look like so that you couple the inductors in the right direction. As for the loss, I suggest you assume the transformer is ideal, and mentally add an insertion loss to your design.

regards,
Aaron

Title: Re: How to implement a transformer with center tap in cadence?
Post by yong_rfic on Sep 11^th, 2012, 8:17pm

Hi Araon,
Thanks again for your reply. The thing that puzzles me most is how to mimic the behavior of real on-chip transformer using lumped model. Since the circuit is going to be taped-out, ideal components is not suitable here. I see some papers using relatively simple transformer model, like the one shown in the attachment. I am wondering whether this model is used for simulation or analysis only?

Title: Re: How to implement a transformer with center tap in cadence?
Post by aaron_do on Sep 11^th, 2012, 10:34pm

Hi,

Usually we need to design our own transformers. I thought you were at the very initial design phase where you haven't yet designed your transformer and you just want a rough model for how it will work.

Assuming you have already designed your transformer using some EM simulator, you can directly use the s-parameters in cadence for the most accurate results (no modeling required). However, you may need an RLC model for certain simulations (transient analysis maybe). Every RLC model has a "model bandwidth" which says up to what frequency it is accurate. You can check this by simply overlapping the results between your EM-extracted s-parameters, and your model. Your model bandwidth should probably cover a few harmonics to be accurate. The more parasitic effects you model (e.g. substrate network, inter-winding capacitance etc), the higher the model bandwidth.

To get the best results I recommend you use wafer probing to correlate your process with you EM simulations, and then use the EM simulation S-parameters directly in your simulation.

regards,
Aaron

Title: Re: How to implement a transformer with center tap in cadence?
Post by yong_rfic on Sep 12^th, 2012, 8:38am

Thanks for your patience. I have two questions following up, hopefully it wont bother you too much.

I build a circuit as in the attachment. The turn ratio is 1:1 and K is 1 as well. But the output current amplitude is not equal to the amplitude of each branch. Why?

Another question is will it cause some problem by putting two inductors in series? I mean each half cycle only one transistor is on, which means one of the secondary inductors carries current and the other one doesn't. But since these two secondary inductors are connected in series, how is it possible that one is conducting while the other one is not?