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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> oscillator reference voltage variation https://designers-guide.org/forum/YaBB.pl?num=1347545799 Message started by lhlbluesky_lhl on Sep 13th, 2012, 7:16am |
Title: oscillator reference voltage variation Post by lhlbluesky_lhl on Sep 13th, 2012, 7:16am in most internal-chip RC osc, comparator is always used, sometimes two comp(one for VH threshold, one for VL threshold), and sometomes only one comp (the other threshold is ground maybe). however, the variation of VH or VL will influence the accuracy of osc output frequency,that is, generating different clock period Tclk for different cycles, so, clock jitter appears. then, how to minimize the influence of reference voltage variation(VH or VL) on clock frequency? what methods should be used normally if we have no off-chip large cap for reference voltage stabilization? thanks. |
Title: Re: oscillator reference voltage variation Post by loose-electron on Sep 16th, 2012, 8:14pm What are you trying to do exactly? RC oscillators on chip are very inaccurate due to process variance, and that will probably affect things a lot more than just the stability of the switching voltage |
Title: Re: oscillator reference voltage variation Post by analog_wiz on Nov 19th, 2012, 7:40pm Instead of plainly assuming the effect of VH and VL , i would suggest you run the simulation across few corners and then conclude.Also why dont you try the simple cap charged with current source tripping against reference for generating the clock?I had lots of problems tripping against 2 voltage references when i did this a few years ago. |
Title: Re: oscillator reference voltage variation Post by analog_wiz on Nov 20th, 2012, 9:58pm If you can generate the reference current as well as voltage against which the comparator trips from the same Bandgap, you can make the output frequency virtually independent of the variations in vref,iref.Then the only inaccuracies are due to mismatch (current source,trip point of comp). Also you will need atleast adequate trim range for process variationsm,depending on the accuracy you need to meet. Let me know more about the design and i can help. |
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