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Design >> Analog Design >> about design of S/C filter
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Message started by lhlbluesky_lhl on Nov 2^nd, 2012, 6:10am

Title: about design of S/C filter
Post by lhlbluesky_lhl on Nov 2^nd, 2012, 6:10am

in S/C bandpass filters, the center frequency f0 can be tuned by clock frequency fclk, and normally, fclk is much larger than f0, 50 times or bigger. however, in some cases, f0 is just the input signal frequency (ex:in ir receiver, f0 is the carrier frequency), f0=fsignal, then, in half period of input signal, fclk works 25 cycles, so, how to decide the transient output for S/C filter? if tuning the frequency of fclk to obtain desired f0, then in half period of input signal, fclk may be not integral cycles, can this cause a wrong transient result?

besides, in S/C bandpass filters, how to simulate the AC response (center frequency f0, Q, etc), just as the continuous filter (in hspice)?

thanks.

Title: Re: about design of S/C filter
Post by buddypoor on Nov 2^nd, 2012, 8:36am

lhlbluesky_lhl wrote on Nov 2^nd, 2012, 6:10am:

in S/C bandpass filters, the center frequency f0 can be tuned by clock frequency fclk, and normally, fclk is much larger than f0, 50 times or bigger. however, in some cases, f0 is just the input signal frequency (ex:in ir receiver, f0 is the carrier frequency), f0=fsignal, then, in half period of input signal, fclk works 25 cycles, so, how to decide the transient output for S/C filter? if tuning the frequency of fclk to obtain desired f0, then in half period of input signal, fclk may be not integral cycles, can this cause a wrong transient result?
Besides, in S/C bandpass filters, how to simulate the AC response (center frequency f0, Q, etc), just as the continuous filter (in hspice)?

thanks.

* Time domain: Integral cycles yes/no within one half period are no problem at all because S/C filters are no digital filters. They belong to the class of "sampled data systems" - somewhere between analog and digital. That means: Amplitude informations are updated at discrete times only, but the signal is a time-continuous one due to sample-and-hold operations at the output of each stage.

* Frequency domain (ac response): There a special simulation packages (like SPECTRE), which are able to calculate the frequency response (including periodic repetitions within the spectrum). If you prefer classical simulation packages (PSpice, HSpice, LT-Spice) you must previously convert the S/C circuit into a time-continuous equivalent. As far as I know, for this purpose there are two basic principles described in the literature.
(I have used both methods already - and they work perfectly).

Title: Re: about design of S/C filter
Post by nrk1 on Nov 2^nd, 2012, 9:59pm

You can simulate the impulse (unit pulse) response of an SC filter quite easily in contrast to a continuous-time filter. Taking the DFT of this gives you the transfer function. This is exact(for the sampled data response) and less time consuming than periodic steady state when you have to include a lot of harmonics in the latter.

See http://www.ee.iitm.ac.in/~nagendra/E4215/2004/handouts/scfsim.pdf

Title: Re: about design of S/C filter
Post by lhlbluesky_lhl on Nov 3^rd, 2012, 5:23am

hi, buddypoor, how to convert the S/C circuit into a time-continuous equivalent? can you explain to me more clearly?
thanks.

Title: Re: about design of S/C filter
Post by lhlbluesky_lhl on Nov 3^rd, 2012, 5:50am

and nrk1, i have looked at the pdf file, but i have some questions:
1, how to add the impulse input Vin for N=1024 cycles? is it just a repetition of one impulse?
2, i had used the function 'dft' before, but i only get the frequency spectrum (just a figure), not the transfer function. so i cannot get the ac response for S/C bandpass filter(f0, Q, etc). can you tell me more about the 'dft' method?
thanks.

Title: Re: about design of S/C filter
Post by buddypoor on Nov 3^rd, 2012, 6:38am

lhlbluesky_lhl wrote on Nov 3^rd, 2012, 5:23am:

hi, buddypoor, how to convert the S/C circuit into a time-continuous equivalent? can you explain to me more clearly?
thanks.

Hi ihlbluesky,

* For the method which I prefer I enclose a short paper which I have translated right now from german to english (it is part of a book which I have published in german). The method is based on the following original documentation:

Biolek, D., Biolkova, V., Kolka, Z.: AC Analysis of idealized Switched-Capacitor Circuits in SPICE compatible programs
(Proc. of the 11th WSEAS int. conference on circuits, Kreta 2007, p. 223-227.)

* The second method (which is - for my opinion - more involved) is based on the STORISTOR concept (resistor with storage capability) and is described by

Nelin, B.D.: Analysis of Switched-capacitor networks using general purpose simulation programs
(IEEE Trans. Circuits and systems, vol CAS-30, 1983, p. 43-48.

Title: Re: about design of S/C filter
Post by nrk1 on Nov 3^rd, 2012, 10:30am

lhlbluesky_lhl wrote on Nov 3^rd, 2012, 5:50am:

By definition, the transfer function of the filter is the fourier transform of the impulse response. For discrete time systems, the impulse is a unit pulse, i.e. an input that is 1 for one clock cycle and zero afterwards. You can refer to standard textbooks like the one by Oppenheim and Shafer for this. How many samples you take in the DFT depends on the frequency resolution you desire in the transfer function. With 1024 cycles(a single 1 followed by 1023 zeros), your frequency resolution will be fs/1024. You can change this number as you desire. For a narrow bandpass filter, you may have to use a lot more. So all you have to do is to use an input pulse which lasts for one clock cycle and run the transient simulation for the desired number of cycles. Take the DFT of the desired voltage at the right points(i.e. at the end of each cycle in which that voltage is updated. e.g. if you are looking at the output of an integrator which updates in phi1, you look at the samples near the end of phi1) You can use strobing to improve accuracy.

Just make sure that the unit pulse is sampled only once. In some SC filters, the input is sampled in both phi1 and phi2(and more phases if they are present) on different capacitors. In such cases, make sure that all such capacitors which are supposed to sample the input do so only once and then sample zeros.

Make sure that the input voltage is within linearity limits. To be on the safe side, choose a small pulse of 100mV and divide the output voltage by 0.1 while taking the DFT. Experimenting with lengths(instead of 1024) and amplitudes will quickly give you an idea.

From the plot, you can extract f0, Q etc.

Title: Re: about design of S/C filter
Post by lhlbluesky_lhl on Nov 4^th, 2012, 5:02am

thanks all very much. and buddypoor, can you give me the two file 'AC Analysis of idealized Switched-Capacitor Circuits in SPICE compatible programs' and 'Analysis of Switched-capacitor networks using general purpose simulation programs', i just cannot get them from network.

Title: Re: about design of S/C filter
Post by buddypoor on Nov 4^th, 2012, 1:52pm

lhlbluesky_lhl wrote on Nov 4^th, 2012, 5:02am:

The 1st document can be found here:

http://www.designers-guide.org/Forum/Attachments/SC_AC_Simulation.pdf

Sorry, but I don`t have the 2nd document available at the moment.
Perhaps you have access to the book
Ghausi/Laker: Modern Filter Design (1981).
This book also contains the fundamentals of the method described by B.D. Nelin in his paper.
As mentioned already, this method uses a an artificial element called "storistor" (Resistor with storage capabilities for a time equal to a half or a full sampling period Ta). Nelin realizes this element with a delay line. However, for my opiniuon it is much simpler using a controlled voltage source with the transfer function in Laplace notation exp(-sTa). I have used this method several times - it is 100% correct.

In case you are interested I can send you a drawing of the simulation arrangement. For my opinion, this should be sufficient to understanf the method without going through the original documentation.

Title: Re: about design of S/C filter
Post by lhlbluesky_lhl on Nov 5^th, 2012, 4:10am

ok, buddypoor, can you send me a drawing of the simulation arrangement? and how to add an exp(-j*w*T) stimulus in the circuit? there is no 'j' term in exp function.
thanks.

Title: Re: about design of S/C filter
Post by buddypoor on Nov 5^th, 2012, 7:52am

lhlbluesky_lhl wrote on Nov 5^th, 2012, 4:10am:

ok, buddypoor, can you send me a drawing of the simulation arrangement? and how to add an exp(-j*w*T) stimulus in the circuit? there is no 'j' term in exp function.
thanks.

OK, I have prepared two pages, which I will send to you via e-mail.
Regarding the stimulus in the frequency domain - the simulation programs accepts the symbol "s" for "jw".