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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Modelcard for the Verilog-A device https://designers-guide.org/forum/YaBB.pl?num=1354791473 Message started by Deadok on Dec 6th, 2012, 2:57am |
Title: Modelcard for the Verilog-A device Post by Deadok on Dec 6th, 2012, 2:57am Hello! I have a trouble in passing parameters from the modelcard to the Verilog-A description of my device when I use Cadence. To keep it simple let's have a look at the simplest resistor. There is a single parameter there: parameter real r=10 from [0:inf); I create a modelcard for this resistor which looks like this: simulator lang=spectre insensitive=yes ahdl_include "resistor_tst.va" subckt resist ( p n ) resist ( p n ) rr ends resist model rr resistor_tst + r = 100 This model card (resist.scs) is included into ADE Model libraries. The resistor is represented in my schematics by a symbol with the view name "spectre". The new component parameter was added in the CDF base layer: Name: model; Prompt: resistor_tst; type: string; Parse as CEL: yes; In the simulation in formation for spectre I specified termOrder = p n. The "otherParameters" = model. That is the description of my setup. Afterwards I run a DC analysis, but get a warning from spectre: resist.scs" 13: rr: `r' is not a valid parameter for an instance of `resistor_tst'. Ignored. What would you recommend me to do? I would like to use modelcards as as soon my problem is solved I will use the same solution for a simulation of a MOSFET. Thanks for support! |
Title: Re: Modelcard for the Verilog-A device Post by Geoffrey_Coram on Dec 6th, 2012, 7:52am You should contact Cadence support. There is a special method they use to allow modelcards with Verilog-A models, but it may be proprietary. |
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