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Design Languages >> Verilog-AMS >> Bug or nor not a bug in table_model
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Message started by RolfK on Dec 16th, 2012, 8:34am

Title: Bug or nor not a bug in table_model
Post by RolfK on Dec 16th, 2012, 8:34am

Dear Experts,

I'm not sure if I run into a bug or did not understand the LRM.
SimVison gave me a very hard time (chrashed) before I could figure out the root cause. Please see belows test lines commented with OK or NG.

my table data is the same as in the LRM 2.3.1

Code:
# 2-D table model sample example
#                              
# y x f(x,y)                    
#y=0 isoline                    
     0.0      1.0      0.5                    
     0.0      2.0      1.0                    
     0.0      3.0      1.5                    
     0.0      4.0      2.0                    
     0.0      5.0      2.5                    
     0.0      6.0      3.0                    
#y=0.5 isoline                  
     0.5      1.0      1.0                    
     0.5      3.0      2.0                    
     0.5      5.0      3.0                    
#y=1.0 isoline  
     1.0      1.0      1.5                
     1.0      2.0      2.0
     1.0      4.0      3.0


My trial lines are below:

Code:
           // I(corePower) <+ ($table_model( 0.0  , V(corePower) , "../_ams_table_models/Test2d.dat"  )) ; // OK      
           // I(corePower) <+ ($table_model( 0.0 , tPosOffsetTime , "../_ams_table_models/Test2d.dat"  )) ; //OK      
           // I(corePower) <+ ($table_model( 1   , tPosOffsetTime , "../_ams_table_models/Test2d.dat"  )) ; // NG
           // I(corePower) <+ ($table_model( 1.0 , tPosOffsetTime , "../_ams_table_models/Test2d.dat"  )) ; // OK
           // I(corePower) <+ ($table_model( 0   , tPosOffsetTime , "../_ams_table_models/Test2d.dat"  )) ; // NG


It looks like if the isoline (first arg) is passed a integer string I run into problems. I have alos tested a variable as arg 1 which was defined as interger. This leads to the same fail.

The LRM says:

Quote:
4.2.1.2 Integer to real conversion
Implicit conversion shall take place when an expression is assigned to a real. Individual bits that are x or z in
the net or the variable shall be an error (see 7.3.2).


For a string integer this is may be not applicable, but if I pass a variable nad the function expects a real implicit conversion schould take place.

Could sameone confirm that this is really a bug and not a wrong usage of AMS by myself ?

Thanks a lot

RolfK

Title: Re: Bug or nor not a bug in table_model
Post by Geoffrey_Coram on Dec 17th, 2012, 8:03am

I agree with you that this is a bug in the simulator.

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