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Design >> Mixed-Signal Design >> Top plate sampling VS bottom plate sampling in SAR ADC
https://designers-guide.org/forum/YaBB.pl?num=1360773816

Message started by kollayliu on Feb 13^th, 2013, 8:43am

Title: Top plate sampling VS bottom plate sampling in SAR ADC
Post by kollayliu on Feb 13^th, 2013, 8:43am

Hi all,

In SAR ADC, one advantage of top plate sampling over bottom plate sampling is that the number of unit capacitors of the former is only the half of the latter. What's the reason for that?

Thanks in advance.

Title: Re: Top plate sampling VS bottom plate sampling in SAR ADC
Post by RobG on Feb 23^rd, 2013, 1:36pm

I don't think it has anything to do with top or bottom plate. You'll have to post the schematics so we can figure out why they are different.

Title: Re: Top plate sampling VS bottom plate sampling in SAR ADC
Post by Morph19 on Mar 14^th, 2013, 8:05am

Its because in top plate sampling you have the inputs signals in the inputs of the comparator after the sample period. In bottom plate you have to sample the input in all the capacitor and next start the switching procedure lets say by connecting the MSB capcitor to Vref and the rest to ground, but sine in top plate sampling you already have the inputs in the comparator from the begining you dont need that MSB capacitor anymore.

Title: Re: Top plate sampling VS bottom plate sampling in SAR ADC
Post by kollayliu on Mar 22^nd, 2013, 4:24pm

Dear RobG and Morph19, thanks for your reply. Your reply helped me figured it out.