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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Questions about Ken's ideal sample and hold model ? https://designers-guide.org/forum/YaBB.pl?num=1361437238 Message started by Jacki on Feb 21st, 2013, 1:00am |
Title: Questions about Ken's ideal sample and hold model ? Post by Jacki on Feb 21st, 2013, 1:00am Hi, I am not familiar with verilog A, so it is a little difficult for me to understand and use Ken's ideal sample and hold model in his white paper http://www.designers-guide.org/Analysis/sc-filters.pdf. Could anybody explains it a little bit, especially the variables like Pin, Nin, Pout, Nout? What do they mean, and how I should use the model? Thank you very much! Jacki. |
Title: Re: Questions about Ken's ideal sample and hold model ? Post by Jacki on Feb 21st, 2013, 1:13am Can I use the ideal switch (from analogLib) as the ideal sample and hold? Jacki. |
Title: Re: Questions about Ken's ideal sample and hold model ? Post by Jacki on Feb 22nd, 2013, 12:28am Hi, It is my test bench as shown below, I don't know how to connect the output from switched capacitor circuits to the ideal sample and hold model. Any comments? Thank you. |
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