The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> Corner
https://designers-guide.org/forum/YaBB.pl?num=1362130541

Message started by DDC on Mar 1^st, 2013, 1:35am

Title: Corner
Post by DDC on Mar 1^st, 2013, 1:35am

Hello,

could somebody describe me, why is high temperature, low Vdd and fast/fast for MOS often the worst case corner ? Thanks for response.

Title: Re: Corner
Post by tzg6sa on Mar 1^st, 2013, 1:58am

It is not wise to state something like that. The circuit has to be known before deciding the worst case corner. Also a circuit has many worst case corners. It depends on what performance metric are you focusing to.

Title: Re: Corner
Post by ywguo on Mar 3^rd, 2013, 1:28am

I agree with tzg6sa. It's not easy to say which corner is the worst by rule of thumb. That depends on your circuit and what do you pursue?

Best Regards,
Yawei

Title: Re: Corner
Post by raja.cedt on Mar 3^rd, 2013, 2:34am

hello,
as every one pointed out it depends on bias and more imp is parameters of imp.

1.low vdd, slow nmos and pmos, low temp will be the worst case of a frequency divider, but this works pretty well for BW of high speed buffers.....
2. slow nmos and fast pmos or slow pmos and fast nmos will be the worst case for offset...

Thanks,
Raj.