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Design Languages >> Verilog-AMS >> Inherited Connections
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Message started by irfan35 on Apr 20^th, 2013, 1:19am

Title: Inherited Connections
Post by irfan35 on Apr 20^th, 2013, 1:19am

Hi all,

Ironically enough I have inherited a few custom digital cells that use inherited connections for the supply pins.

I have modeled most of my design sub-blocks in Verilog-A for Spectre-Verilog sims, except for these custom cells as they don't have any supply pins.

For a simple inverter, I have tried using the usual, but I can't get the supply pins to extract for my Verilog-A code (the schematics extract just fine):

Here is the partial code as I don't have access to the full code right now:

// Inherited Supply Connections
// *************************
electrical (* integer inh_conn_prop_name = "VPOS";
integer inh_conn_def_value = "cds_globals.\\VPOS! "; *) vdd;

electrical (* integer inh_conn_prop_name = "VNEG";
integer inh_conn_def_value = "cds_globals.\\VNEG! "; *) vss;

electrical (* integer inh_conn_prop_name = "VSUB";
integer inh_conn_def_value = "cds_globals.\\VSUB! "; *) Vsub;

I'll appreciate any feedback & help with this.

Thanks,

Irfan

Title: Re: Inherited Connections
Post by boe on Apr 22^nd, 2013, 4:47am

Irfan,

Code:

// Inherited Supply Connections
// *************************
electrical (* integer inh_conn_prop_name = "VPOS";
integer inh_conn_def_value = "cds_globals.\\VPOS! "; *) vdd;

electrical (* integer inh_conn_prop_name = "VNEG";
integer inh_conn_def_value = "cds_globals.\\VNEG! "; *) vss;

electrical (* integer inh_conn_prop_name = "VSUB";
integer inh_conn_def_value = "cds_globals.\\VSUB! "; *) Vsub;

This is standard code for inherited connections. It connects e.g. (the internal signal) vdd to (the global signal) VPOS! or the net given in a netSet property VPOS.

- B O E

Title: Re: Inherited Connections
Post by boe on Apr 22^nd, 2013, 5:26am

Irfan,

The model does not have supply pins in the classcial sense. The (IMO) easiest way to use with an analog design flow is to either change the schematic to inherited connections or the model to have supply pins.

- B O E

Title: Re: Inherited Connections
Post by irfan35 on Apr 25^th, 2013, 9:35pm

Thanks Boe. Yes, I 100% agree with you and regret not forcing for the inclusion of actual pins in the cell symbols.

For now, I am using the parameter declarations to get the supply information, but this doesn't track any supply changes.

One of the supplies for custom cells is internally generated & must track the main supply to avoid exceeding breakdown levels (depending on where a cell might be used, the supply can be either VPOS or VNEG). For now I can't simulate realistic power up and power down sequences without using 100% transistor level schematics.

Now, you mentioned "the model to have supply pins."

Since the custom cell symbols do not have actual pins, how can I include extra supply pins in the model and still get things to match?

-Irfan

Title: Re: Inherited Connections
Post by boe on Apr 26^th, 2013, 7:09am

Irfan,
I assume your design (schematic) uses inherited connections as it does not have supply pins. In this case you use the inherited connection code you gave in your initial post (changing the names appropriately).
Then you can access the supplies with the signal names vdd, vss and Vsub (for your code fragment).
- B O E
PS (added): You can use either method for the supply - as long as schematic, model, ... of a cell all use the same one.

Title: Re: Inherited Connections
Post by irfan35 on Apr 26^th, 2013, 2:59pm

Hi BOE,

I'm missing something subtle here and I'll appreciate it very much if you could clear the following for me:

In the attached examples I have one inverter that is used in two separate places and uses different supplies.

Is it possible to create a single verilogA model that covers different possibilities based on the supply info passed down to it - OR - I'll have to create a unique model for each case?

I'll like to create a single "general" model just like the schematic if it is at all possible.
Thanks,

Irfan

Title: Re: Inherited Connections
Post by irfan35 on Apr 26^th, 2013, 3:03pm

The attachments!

Title: Re: Inherited Connections
Post by boe on May 6^th, 2013, 3:17am

Irfan35,
unfortunately I could not look at this last week.
Yes, you can write a model for this inverter that uses the inherited supplies based on the code above. What exactly does not work as you expect?
- B O E