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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Delay Locked Loop False Locking Problem https://designers-guide.org/forum/YaBB.pl?num=1369316550 Message started by saurabh3488 on May 23rd, 2013, 6:42am |
Title: Delay Locked Loop False Locking Problem Post by saurabh3488 on May 23rd, 2013, 6:42am Hi, can anyone please help me regarding the false locking in delay locked loop. and how we can avoid this false or ant-harmonic locking. thanks |
Title: Re: Delay Locked Loop False Locking Problem Post by raja.cedt on May 27th, 2013, 3:02pm Please describe your problem clearly. Normally due to problems in the Phase detector output multi phase align with proper phase difference but the phase shift will be multiple of clock period. You can have look on self correcting DLL which has detection mechanism in PD. May be digital DLL helps some times. Thanks, Raj. |
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