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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> veriloga code of a switch https://designers-guide.org/forum/YaBB.pl?num=1372166414 Message started by jovial on Jun 25th, 2013, 6:20am |
Title: veriloga code of a switch Post by jovial on Jun 25th, 2013, 6:20am Hello everyone!! I am modeling a simple voltage controlled switch which shld be a short ckt when control voltage is high, and open otherwise. But the switch doesn't seem to work.. Can someone tell the mistake in my code given below... ----------------------------------------------------------------------------------- `include "disciplines.vams" module dig_ctrl_switch_va (p, n, ps, ns); parameter real thresh=0.9; // threshold (V) parameter real ron=10 from (1:inf); // on resistance (Ohms) parameter real roff=100M from [1:inf); // off resistance (Ohms) input ps, ns; electrical p, n, ps, ns; analog begin @(cross( V(ps,ns) - thresh, 0 )) $discontinuity(0); if (V(ps,ns) > thresh) I(p,n) <+ V(p,n)/ron; else I(p,n) <+ V(p,n)/roff; end endmodule |
Title: Re: veriloga code of a switch Post by Frank Wiedmann on Jun 25th, 2013, 8:40am You don't tell us what exactly is not working (error messages, simulation results, ...). However, it is obvious that your coding style can be improved. Take a look at chapter 3 "AMS Behavioral Modeling" of the Mixed-Signal Methodology Guide, which is available in four pdf files from http://www.eetimes.com/electronics-blogs/eda-designline-blog/4397605/Book-excerpt--Mixed-signal-methodology-guide-part-4. I would recommend you to use a transition function as shown on page 59 (the example is in Verilog-AMS, but a similar approach can be used in Verilog-A). By the way, Spectre has a similar component already built in, see http://www.cadence.com/community/forums/T/26543.aspx. |
Title: Re: veriloga code of a switch Post by boe on Jun 25th, 2013, 8:41am Jovial, see LRM: "You must declare the port direction for every port in the list of ports section of the module declaration. To declare the direction of a port, use one of the following three syntaxes. ..." Otherwise the code seems OK. - B O E |
Title: Re: veriloga code of a switch Post by boe on Jun 25th, 2013, 8:43am Frank, I fully agree. However, the V-AMS section of this site does offer a very similar example. So it should work. - B O E |
Title: Re: veriloga code of a switch Post by Frank Wiedmann on Jun 25th, 2013, 8:49am It will probably work in simple circuits, but it might cause convergence problems in more complex ones. |
Title: Re: veriloga code of a switch Post by boe on Jun 25th, 2013, 8:53am Frank, I also prefer the transition method... - B O E |
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