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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Maths behind bandgap startup https://designers-guide.org/forum/YaBB.pl?num=1372328941 Message started by thomasross20 on Jun 27th, 2013, 3:29am |
Title: Maths behind bandgap startup Post by thomasross20 on Jun 27th, 2013, 3:29am Hi all, So when a typical bandgap starts up we're in open loop, forcing some node such that current starts to flow in the circuit. Before the bandgap voltage is reached, the start-up circuit turns off (otherwise it'd always be on). How then does the circuit know to keep increasing in voltage rather than return back to the 'zero' state? There needs to be enough loop gain AT THIS POINT, but just how much? Say VREF got up to 0.8V, so there are 0.4V to go to reach 1.2V. Is this related to the geometric series (e.g. you only need a small gain>1 or so which is consequently multiplied up and up until 1.2V is reached)? Who actually figures out the numbers when designing these circuits as opposed to relying on transient start-up sims. Is there a rule of thumb figure for desired gain (I guess this related to the difference between 1.2V and whatever voltage VREF is at when the start-up turns off)? I guess 'r' of the geometric series would be the loop gain and 'a' would be the initial voltage when the start-up circuit turns off. Thanks! |
Title: Re: Maths behind bandgap startup Post by thomasross20 on Jun 27th, 2013, 5:38am Further to this (I may as well add this, I don't write here often!) - there are two loops in a bandgap, +ve feedback and -ve feedback. +ve feedback helps you get to the initial 1.2V reference voltage. -ve feedback then helps regulate. We must make sure that -ve feedback loop gain is greater than the +ve feedback loop gain else we go unstable. Is the DIFFERENCE in loop gains the 'true' loop gain which determines the accuracy of VREF? Also, what if the BANDWIDTH of the +ve feedback loop is greater than that of the -ve feedback loop such that we have gain in the +ve path when the -ve path gain has gone to zero? With a 'high frequency load' does this mean the bandgap becomes unstable? I assume so. OK, that's it! Thanks! |
Title: Re: Maths behind bandgap startup Post by thomasross20 on Jun 27th, 2013, 6:14am Further to my first post - it has been suggested to me that as soon as you trickle current into a bandgap (I'm thinking of classic Brokaw with delte VBE across a resistor due to two NPNS, one single NPN and the other 8 times, for example).... then the current in the 8x device is larger until the bias point is reached. This is fed back around a current mirror and fights against the 1x device current. Since the 1x device current is less at start-up is it true that this is like a latching behaviour (the +ve feedback) - thus as soon as that 8x current gets going, it's naturally going to just ramp up to 1.2V? Lot of confusion here - I need to sit down and sort it all out in my head! |
Title: Re: Maths behind bandgap startup Post by Kevin Aylward on Jul 6th, 2013, 1:44am In principal, a well designed bandgap should not actually require transient simulations to confirm its DC operation. This is because it should be designed to be DC stable. Transient simulations are used to confirm loop stability. The key point about a bandgap, is that its PTAT generator part has a topology that has two potential stable operating points. I have a tutorial on how to reliably design and verify a PTAT generator here, http://www.kevinaylward.co.uk/ee/ptat/PTAT.xht |
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