The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> RF Design >> UWB LNA Design
https://designers-guide.org/forum/YaBB.pl?num=1373458055

Message started by Khalil Yousef on Jul 10^th, 2013, 5:07am

Title: UWB LNA Design
Post by Khalil Yousef on Jul 10^th, 2013, 5:07am

Dear all,

I am an UWB LNA designer but I have some questions which I hope you can answer.

1- for the use of inductors, may I have a design whose bandwidth extends above the self resonance frequency of an inductor used or employed in this design implementation?

2- should Cadence and ADS simulation tools detect this self resonance frequency effect?

3-concering the use of Microtech EYE pass DC probe, Do I need a specific setup for a proper bias of CS and CG amplifiers (adding bypass or grouding capacitos?) ?.

Thanks in advance

Title: Re: UWB LNA Design
Post by RFICDUDE on Jul 10^th, 2013, 5:51pm

Hi Khalil,

You have not provided enough information for us to provide you with a good answer for any of your three questions.

1. Generally it is not a good idea to use an inductor (as an inductor) above its self resonant frequency because it no long behaves as an inductor. However, we do not know how you intend to use the inductor, so it is difficult for anyone to comment on how the self resonant frequency will impact the performance of your design.

For instance, if the inductor is used primarily for an RF choke, then perhaps it may be ok if the self resonant frequency is within your operating bandwidth.

On the other hand, if the inductor is specifically used for impedance matching then it may not be acceptable.

2. Cadence and ADS are just simulator environments, they will detect whatever the models predict. The accuracy of the models are much more important than the specific tool. So, how is the inductor resonance modeled: s-parameters from EM simulation, factory provided models, etc.?

3. More specific information is needed to answer your question. Are you asking if the bypass and decoupling capacitors need to be supplied on your die or for the probes? Generally it is best to have all your decoupling and by-passing for high frequency signal on the die to keep all high frequency currents local to the die.

Best regards,
RFICDUDE

Title: Re: UWB LNA Design
Post by Khalil Yousef on Jul 11^th, 2013, 3:49am

Thanks a lot for this beneficial reply.

1- The inductor is inserted for inter-stage match between 2 different CMOS amplifying stages. For instance, I checked the inductor self resonance frequency, It was about 7 GHz but I use it in an LNA whose frequency reaches 10 GHz and the simulation results are so good. will it work correctly after implementation (Fabrication)?

2- I use in simulation 2 diode connected PMOS transistors in sub-threshold region as voltage divider for gate bias to suppress noise and also this gives very good simulation results. Should I use the same configuration on die? Will the performance will be the same?

Thanks in advance

Title: Re: UWB LNA Design
Post by RFICDUDE on Jul 11^th, 2013, 4:38am

1. How well it will work over process variation is difficult to say. The inductor impedance changes rapidly around the self resonant frequency and is sensitive to process variation.

We can only rely on how well the model represents the performance variation that will be seen across process variation. If you are using an EM simulation result for the inductor then you probably do not have an idea how the inductor will change. On the other hand, if you are using a foundry supplied inductor model then you need to look at measured versus modeled performance out past the self resonant frequency. Your simulation results will, at least, be valid if the models are accurate including parasitics, package and any other external circuits that impact the RF performance.

2. I typically do not rely on diode biasing to set the current in an amplifier. I would think the bias current would be sensitive to supply voltage variation. This also means the supply rejection of high frequency signals may be poor.

You need to simulate the supply rejection.
You also need to simulate over process variation and temperature to see how much the gain and current changes?