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Design >> Analog Design >> Vdsat vs VOD
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Message started by ortali on Aug 12^th, 2013, 12:50am

Title: Vdsat vs VOD
Post by ortali on Aug 12^th, 2013, 12:50am

Hi Guys, I simulate a transistor in hspice, which I want to put in saturation. I recieve vdsat = 110mV, vod = 146mV, vds=142mV. The simulator states that the transistor is in linear region.
I thought that saturation happens when vds> vdsat, however, it seems that vds also must be bigger than vod. Is this correct? It is 0.065u technology, and the L=0.5u.

Thanks a lot,
Ortal.

Title: Re: Vdsat vs VOD
Post by raja.cedt on Aug 12^th, 2013, 1:02am

hello,
Linear region........vgs-vth(vod)>vds....hence Linear region.

Title: Re: Vdsat vs VOD
Post by Kevin Aylward on Aug 12^th, 2013, 9:43am

Comment: Vgst (vgs-vt or vod) is *approximately* equal to vdsat, so they get interchanged in paper and pencil analysis. Analog is all about approximations. 110mv IS ~ 140mv. Regions are not sharp. If you want full, high output impedance (low gds), you should run a few hundred mv over the alleged vgst, possibly 1/2V!

Title: Re: Vdsat vs VOD
Post by harpoon on Aug 13^th, 2013, 2:32am

I am not familiar with 65nm models ... but in BSIM4, if vgs-vt(vod)>0 and vds > vdsat, you are in saturation.

however, there are 3 different saturation regions depending on vds ... namely channel length modulation (CLM), DIBL and Substrate Current Induced Body Effect (SCBE), as vds is increased beyond vdsat.

... at least that is what spectre is reporting.

I would check the hspice and process model manuals if you are still curious.

This is all academic of course ...

... Kevin's comments makes more practical sense !