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Design Languages >> Verilog-AMS >> Verilog-A Phase noise model for RF Mixer or RF Multiplier?
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Message started by weic on Aug 17^th, 2013, 2:34pm

Title: Verilog-A Phase noise model for RF Mixer or RF Multiplier?
Post by weic on Aug 17^th, 2013, 2:34pm

Hi, does anyone know how to model the phase noise of RF mixer or multiplier?
I try to model a phase noise of multiplier type PLL in Cadence.
Since I found a book "Frequency synthesizer design handbook" by James A. Crawford, the book mentions the phase noise of mixer has much lower phase noise than another phase detector(xor, charge-pump pfd..)

Does anyone know any good reference for this?

Thanks