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Design >> Analog Design >> 1T1C DRAM
https://designers-guide.org/forum/YaBB.pl?num=1377537360

Message started by Oceanamie on Aug 26^th, 2013, 10:15am

Title: 1T1C DRAM
Post by Oceanamie on Aug 26^th, 2013, 10:15am

Hello. I need some helpful hints.

I have a 1T1C DRAM, 10 fF capacitor with Vt ~ 1 V.

How often does this this individual cell need to be refreshed in order for the charge stored not to drop below 85% of its maximum value?

Title: Re: 1T1C DRAM
Post by aaron_do on Aug 26^th, 2013, 10:17pm

I don't know much about DRAM, but i'm sure you need to know the off-resistance of the transistor. From there just use

85% = e^-t/RC

Aaron

Title: Re: 1T1C DRAM
Post by Oceanamie on Aug 27^th, 2013, 8:00am

aaron_do wrote on Aug 26^th, 2013, 10:17pm:

I don't know much about DRAM, but i'm sure you need to know the off-resistance of the transistor. From there just use

85% = e^-t/RC

Aaron

This is what I'm trying to solve. I know the charge at 300 K and 400 K easily enough from the graph, but can't find the rest.

Title: Re: 1T1C DRAM
Post by aaron_do on Aug 27^th, 2013, 5:54pm

Hi,

what do you mean you found the charge from the graph? The charge is just Q = CV. The first question is basically trying to see if you know what is the maximum voltage that can be written. After that, the leakage current is read from the graph. From there, you need to know that the total charge leakage is Q = I*t.

Aaron