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Design >> Analog Design >> Duty Cycle Corrector
https://designers-guide.org/forum/YaBB.pl?num=1378925973

Message started by summi on Sep 11^th, 2013, 11:59am

Title: Duty Cycle Corrector
Post by summi on Sep 11^th, 2013, 11:59am

Dear Forum,
Can any please suggest a good DCC for 5Ghz ring oscilator? I have seen one simple DCC in J. Lee and B. Kim, “A low-noise fast-lock phase-locked loop with
adaptive bandwidth control,” IEEE J. Solid-State Circuits, vol. 35, pp.
1137–1145, 2000, however i didn't understand it operation, can any one please explain how wit works??

Br,
Summi.

Title: Re: Duty Cycle Corrector
Post by aaron_do on Sep 11^th, 2013, 5:36pm

Hi,

this circuit seems to require that you already have 2 signals which have pulses which are separated by half of a period. So you cannot take a single pulse train with say 30% duty cycle and put it through this circuit and get a 50% duty cycle pulse train. Actually I think a differential-to-single ended converter based on a differential pair would do the same thing as this circuit, and possibly more reliably since the proposed circuit isn't perfectly balanced. If you have trouble figuring out the logic here then I suggest you try and simulate the circuit. In the circuit shown, I don't think the NMOS at the top or the PMOS at the bottom contribute much to the output, but I haven't tried simulating it so I could be wrong.

If you want to start off with a single non-50% duty cycle signal and end up with a 50% duty cycle signal, you will probably have to try something else. If you do a differential ring-oscillator, it can be designed to provide differential outputs, and then you could use something like the circuit you showed.

regards,
Aaron