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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> stb analysis, phase=0 at DC https://designers-guide.org/forum/YaBB.pl?num=1380542272 Message started by aherohu on Sep 30th, 2013, 4:57am |
Title: stb analysis, phase=0 at DC Post by aherohu on Sep 30th, 2013, 4:57am Hello, Everyone, I have a problem with stb analysis that occurs frequently in opamp circuits: Loop Gain Phase rises from 0 degree (DC), while it is expected to decrease from 180 degree. By doing a corner simulation, I get phase simulation result as shown in the attached graph. About half of the corners have phase starting from 0 at DC and rises to 90degree (normally it should start with , while the other half shows expected phase result. However, the phase at higher frequencies seems to be correct again, so temporarily no problem with getting the correct phase margin. I use expression --phase(getData("loopGain" ?result "stb"))-- to calculate phase. I checked transient step response result of those specific corners, it shows stable and nice settling behavior, so the circuit is stable. Therefore, this problem has been ignored for a long time. However, I still want to know what caused this abnormal simulation result, and what possible solution there is? I once solved it with changing reltol, iabstol to a smaller value, but didn't succeed anymore. Does anyone have similar experience? Could anyone give a hint what else I can try. Thanks in advance. |
Title: Re: stb analysis, phase=0 at DC Post by Frank Wiedmann on Oct 1st, 2013, 12:29am See http://www.designers-guide.org/Forum/YaBB.pl?num=1294178255. |
Title: Re: stb analysis, phase=0 at DC Post by aherohu on Oct 1st, 2013, 2:31am Hi, Frank, Thanks a lot!! That's really really helpful. |
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