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https://designers-guide.org/forum/YaBB.pl Design Languages >> VHDL-AMS >> how to overwrite a value in VHDL_AMS output file https://designers-guide.org/forum/YaBB.pl?num=1381414195 Message started by Milind Shende on Oct 10th, 2013, 7:09am |
Title: how to overwrite a value in VHDL_AMS output file Post by Milind Shende on Oct 10th, 2013, 7:09am Hello All, Through VHDL-AMS code, I want to write in a file. I want every new value to be written should overwrite the old value. I tried opening the write file in write mode and in append mode. but in both the modes the values are added to the file. for example: in one clock cycle I want to write 7 in a file. in next clock cycle the code should delete 7 and write 3 on its place. so my file content will be 3 and not 7 3 any suggestions ??? :-? thanks in advance. regards, Milind. |
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