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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> About differential amplifier https://designers-guide.org/forum/YaBB.pl?num=1383017868 Message started by analog geek on Oct 28th, 2013, 8:37pm |
Title: About differential amplifier Post by analog geek on Oct 28th, 2013, 8:37pm Hi Guys, I had some questions regarding basic differential amplifier and OTA two stage design which are as follows:- 1. Why do we use pmos current mirror for nmos differential pair and vice-versa? 2.How exactly pmos and nmos differs in current source and current sink action?...I mean how pmos works on source action while nmos on sink action? 3.If I am using nmos differential pair then why I am suppose to use pmos as second common source stage in OTA design?... 4. How exactly NMOS and PMOS performs level shifting operation?.. Thanks in advance, 8-) |
Title: Re: About differential amplifier Post by harpoon on Oct 29th, 2013, 2:21am hi analog_geek, 1. mainly engineering trade off. pmos input has lower flicker noise, nmos has higher bandwidth generally. then there is the issue of input voltage levels (i'll let you figure this one out). 2. you can read this up in almost any ic text book 3. generally yes ... but there many other ways to do this. 4. magic ... or some may say semiconductor physics. i think you may find the berkeley webcast courses very good in getting you up to speed ... try looking at this course ... Electrical Engineering 105, 001 - Spring 2013 http://webcast.berkeley.edu/playlist#c,d,Electrical_Engineering,-XXv-cvA_iApSM93gWkcSauu8gRoH7It good luck ! |
Title: Re: About differential amplifier Post by analog geek on Oct 29th, 2013, 4:52am harpoon wrote on Oct 29th, 2013, 2:21am:
thanks.. but didnt help much... |
Title: Re: About differential amplifier Post by aaron_do on Oct 29th, 2013, 5:14am Hi, 1. Are you implying that you can use an NMOS current mirror with an NMOS diff pair? 2.Yes. Both transistors have high output impedance on their drain side. So PMOS is a good source and NMOS is a good sink. Current sources need high output impedance. 3. You could use an NMOS with an NMOS diff pair if you want. I believe you get better PSRR using a PMOS with an NMOS diff pair since at high frequencies, but I'm not sure if there's another main reason. 4. Because of the VT requirement to turn on a transistor... Aaron |
Title: Re: About differential amplifier Post by analog geek on Oct 29th, 2013, 5:37am aaron_do wrote on Oct 29th, 2013, 5:14am:
Thanks Aaron.. Answer to first question is yes. I actually want to know why nmos is sink and pmos is source. How nmos and pmos differs in their operation in designing point of view? 4. Also how VT helps in level shifting as you said? |
Title: Re: About differential amplifier Post by aaron_do on Oct 29th, 2013, 6:58am Hi, the PMOS and the NMOS are physically different. For the PMOS, the source is at a higher potential than the drain, and for an NMOS, the drain is at a higher potential than the source. That defines the drain and source. Furthermore, a high impedance is seen looking into the drain and a low impedance is seen looking into the source. Because you need a high impedance to mimic a current source, a PMOS naturally forms a source, and an NMOS naturally results in a sink. Does that help? I'm not sure if I'm getting your question. Assuming the transistor is turned ON, there will be a VT drop from the gate to the source. Hence the level shifting. Also, a source follower has an AC gain of 1 due to the inherent negative feedback in the structure. Unless you're asking about device physics, I'm not really sure what else you want to know... Aaron |
Title: Re: About differential amplifier Post by analog geek on Oct 29th, 2013, 7:14am aaron_do wrote on Oct 29th, 2013, 6:58am:
Thank you Aaron..I understood your first answer..u mean to say that looking into drain of pmos we see high impedance while looking into source of nmos we see low impedance..thats y they act as source and sink respectively. thats cool. Now about ur second answer..see i want to know why do we mostly connect pmos in common source configuration in second stage of OTA?..why not nmos?..my professor said its because of dc level shifting which i didnt understood well. he says because of nmos in differential configuration, dc level goes up and then using pmos in second stage of OTA we bring it down as source is at higher potential for pmos...how does pmos helps to bring dc level down?...i am attaching OTA two stage design for ur reference 8-) |
Title: Re: About differential amplifier Post by aaron_do on Oct 29th, 2013, 8:04am Hi, I didn't exactly follow what your professor meant there. Maybe he misunderstood your question. Anyway, for a NMOS diff pair, and a PMOS current mirror, in order to get the best possible matching between your diff pair devices, you would want the drain voltage of the two PMOS transistors (the current mirror) to be equal (you do that by properly sizing the PMOS transistors). A result of this is that when a PMOS is used in the subsequent stage, it is effectively "mirrored" over. It is not a true current mirror because it only works at the quiescent operating point, but the design becomes easier. For example, in your picture, VDQ4 = VGQ3 = VDQ3 to get the best matching in your diff pair. Therefore, VGQ6 = VGQ3 (only at the operating point). Also, because a PMOS mirror is used, there is only one diode drop from the supply to the output of the diff pair. Therefore, the voltage at the output of the diff pair is a little high to connect an NMOS to. Your NMOS might end up in the triode region. Its just a little trickier to design. For example, one diode connected PMOS drop might be 0.8 V. For a 2.5-V supply, that would make the DC level at that point equal to 1.7 V. If you connect an NMOS gate directly to that, and your output DC level is 1.25 V, then your device is operating a little close to the triode region. It could show up in your common-mode range. As I pointed out earlier, I believe you get better PSRR using a PMOS. Its difficult to explain, so I'll leave it to you to analyze if you're interested. Aaron |
Title: Re: About differential amplifier Post by analog geek on Oct 29th, 2013, 9:11pm Talking about PSRR, is it like because PMOS is used in mirror and second stage, they both experience same amount of change due to power supply noise..so PMOS is good for this/?? |
Title: Re: About differential amplifier Post by aaron_do on Oct 29th, 2013, 10:19pm Hi, It's more like if there is any cap from the supply to the gate of the second stage, then at high frequencies, the gate of the second stage will follow the supply. So for a PMOS, VGS = 0, so the device's current is not modulated by the supply. regards, Aaron |
Title: Re: About differential amplifier Post by tm123 on Oct 30th, 2013, 10:24am I think the phrase 'DC level shifting' is a bit confusing. To me it is a matter of 'DC biasing' as Aaron described. If you use an NMOS differential pair followed by an NMOS CS amp, the NMOS differential pair device will almost certainly be biased in the triode region and thus the differential pair will not work as expected. I suggest trying to design the DC biasing on paper using an NMOS differential pair with an NMOS CS amp then a PMOS CS amp. You should see pretty quickly that an NMOS CS amp will cause DC bias issues. |
Title: Re: About differential amplifier Post by analog geek on Oct 31st, 2013, 6:38am tm123 wrote on Oct 30th, 2013, 10:24am:
Thats awesome.. so u mean when we use pmos in second stage of OTA, then as source of PMOS is connected to VSS and its gate is at higher potential .so that VGS will be small enough to keep PMOS in saturation ..while on the other hand if u use NMOS in second stage of OTA, then its VGS will be higher as source is at lower potential compare to PMOS source so that its VGS is high..this will cause nmos to be worked in triode region. Is that correct? |
Title: Re: About differential amplifier Post by tm123 on Nov 8th, 2013, 8:03am I think you are trying to decide which of the attached circuits are better, circuit 1 or circuit 2. Circuit 1 uses a PMOS common source stage, Circuit 2 uses an NMOS common source stage (note the different feedback connections, maybe someone can check me on that). My suggestion is to try to analyze the DC operating point of each circuit and you will see what happens to the NMOS differential pair device in each case. If you have more basic questions about how an NMOS or PMOS transistor works, I suggest looking at some text books such as Gray/Meyer Chapter 2 (I think) which describes transistor operation in detail. |
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