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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> Track&Hold verilog-a code https://designers-guide.org/forum/YaBB.pl?num=1383692056 Message started by ams2015 on Nov 5th, 2013, 2:54pm |
Title: Track&Hold verilog-a code Post by ams2015 on Nov 5th, 2013, 2:54pm Hi, I have the ideal Track&Hold verilog-a model. Now I have to model the circuit for acquisition time with r and c as parameters. V(vout) = V(vin) ( 1 - e -t/RC) Need some pointers on how to start. Should I use the exp function in verilog-a? |
Title: Re: Track&Hold verilog-a code Post by Geoffrey_Coram on Dec 20th, 2013, 1:05pm I would think you'd want to put in some sort of RC network, but I'm not completely sure I understand the equation you're using. |
Title: Re: Track&Hold verilog-a code Post by Ken Kundert on Dec 21st, 2013, 12:56am You might try the RF sample and hold: http://www.designers-guide.org/VerilogAMS/rf-models/sh/sh.va. -Ken |
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