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Design >> Analog Design >> Comparator _ Opamp based
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Message started by shaikss_rf on Nov 22^nd, 2013, 2:20am

Title: Comparator _ Opamp based
Post by shaikss_rf on Nov 22^nd, 2013, 2:20am

Hi,

I have used a OpAmp based comparator in one of my designs. The first file is the circuit. Second and Third are the plots of the comparator inputs and output.. In that, the first sub window is the output of the comparator. Second and third sub- windows are the positive and negative input of the comparator. Though I am varying the inputs to the comparator, I don't see the expected behavior. Though inputs are varying around 1V and there is a significant difference between their inputs, my output is always around 500mV. Can you pls help me out why it is behaving so?

Title: Re: Comparator _ Opamp based
Post by Ken Kundert on Nov 22^nd, 2013, 9:48am

You should not bundle your figures into a zip file. Few people will bother to unzip file.

-Ken

Title: Re: Comparator _ Opamp based
Post by Mikay on Nov 25^th, 2013, 3:21pm

Do you have a reasonable matching? If the second-stage transistors size is unreasonable. The output may be stuck even there are input difference.

Mikay

Title: Re: Comparator _ Opamp based
Post by boe on Nov 26^th, 2013, 12:25am

Shaikss_rf,
Check the operating points and biasing conditions.
- B O E

Title: Re: Comparator _ Opamp based
Post by harpoon on Nov 26^th, 2013, 1:46am

can you post device sizes ?

I just tried the circuit topology on 0.18um and it looks ok.
(I won't bias it this way though !)

So most likely due to your current biasing scheme and device sizing as mentioned by Mikay and boe.