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Design >> Analog Design >> opamp design
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Message started by lvbq on Dec 10^th, 2013, 4:51am

Title: opamp design
Post by lvbq on Dec 10^th, 2013, 4:51am

HI all,

In the application of the opamp, see fig1 ，there will a pole in net A because of the input resistor R1 and input capacitance Cp.

Therefore, in my design of a opamp, I want to minimize the input capacitance of the opamp.what I want to ask is how to minimize it ?
does the circuit in the fig2 plot work?(for minimize the miller effect Cgd of M1 &M2 for using the M3 &M4 )

Title: Re: opamp design
Post by aaron_do on Dec 10^th, 2013, 5:51pm

Hi,

the impedance you are trying to minimize is already small without M3 and M4.

Aaron

Title: Re: opamp design
Post by danmiso on Dec 11^th, 2013, 11:41pm

You can minimize the input capacitance simply by reducing the device size of the differential pair. This requires reducing the tail current source and/or increase of the over drive voltage of the differential pair.

A problem with your circuit is that the high gain of the opamp is spoiled by the resistance of the feedback. You probably want to use a two-stage opamp to isolate the cascode of the folded cascode opamp from the resistive load.

Title: Re: opamp design
Post by Aman on Dec 12^th, 2013, 5:56pm

The drains of M1-M2 differential pair already see a 1/gm impedance, not sure how much you can gain by additional cascoding.