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Design >> Analog Design >> switched capacitor integrator satuartion and low dynamic range
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Message started by jovial on Jan 7th, 2014, 9:03pm

Title: switched capacitor integrator satuartion and low dynamic range
Post by jovial on Jan 7th, 2014, 9:03pm

Hello everyone !!!
I am simulating a switched capacitor based integrator in Cadence. the problem is that the integrator saturates for very low values of input voltages. Also if i give a sinewave input of 100mV amplitude (riding over 0.9V dc; for 180nm technlogy), the output shows a sinewave which never goes below 0.9V.

Can somebody expalin the reason why??? is the output correct???

Title: Re: switched capacitor integrator satuartion and low dynamic range
Post by carlgrace on Jan 10th, 2014, 6:14pm

You need to give us a LOT more information than that.  

What is your schematic?  
Are you using ideal amplifiers?
What are you using for switches?
What is your integrator DC gain?
and so on

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