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Design >> RF Design >> How to choose Rp, L, C for cascode LNA?
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Message started by baab on Jan 29^th, 2014, 2:24am

Title: How to choose Rp, L, C for cascode LNA?
Post by baab on Jan 29^th, 2014, 2:24am

Hi,
I am getting a problem in design a cascode LNA. With the help here and the tutorial in the link below, I chose value of Ls, Lg.
http://www.ece.ucsb.edu/yuegroup/Teaching/ECE219Winter2013/Lecture%20slides%20and%20notes/ECE219-Lec3-4-notes-LNA.pdf
However, are there some guides on how to choose the values for Rp, L, C in the circuit in the attached picture.
Thanks.

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by natnoraa on Jan 29^th, 2014, 8:02am

Hi baab,

I may not be the best in this but let me give this a shot.

RLC would be your resonant tank.

Use omega^2 = 1/(LC), where omega = 2*pi*fc

Rp is there to modify your Q factor. Q = R(sqrt (C/L))
Typically this Rp is present in your inductor by converting the series resistance to parallel resistance (need source on this)

Someone please correct me if I am wrong

Natnoraa

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Jan 29^th, 2014, 8:37am

Thank you, natnoraa.
I have just read somewhere that Rp is used to maximize voltage gain.
At resonance:
Av = - gm*Rp
If so, we should choose Rp as large as possible. However, I don't know constrains here.
For example, I am using TSMC 0.13 technology, I guess these are constrains:

- Space: resistor occupies a large area
- Noise: large resistance will introduce larger noise to the circuit

But as you said Rp is the resistance of my inductor in parallel form.
If so, Rp is fixed as L is fixed?

And from omega^2 = 1/(LC), I can calculate the product LC. However, how to choose L, C now?
The only condition that I know now is LC = a calculated constant.

Ah, I just remember this.

BW = fc/Q.

With given BW and fc, Q can be computed.
As you mentioned above:
Q = R(sqrt (C/L))

From two conditions, we can figure out the value of L, C.
Is that the right method?

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by natnoraa on Jan 29^th, 2014, 5:06pm

Hi baab,

on a sidenote, maybe due to my newbie-lity, i've never touched on Av=-gm*Rp in RF circuits. The gain was always either S21 for small signal or Power Gain for large signal. lna works on small signal thus s21 but for pa it's power gain. This Rp is still a lil' confusing to me apart from using it for tuning Q.

yes resistor occupies larger area so usually I'll use RF choke as biasing for the drain or a quarter wavelength T-line. if L is fixed so will your Rp if you're using a foundry's pdk. in this case the big T.

I suppose your C has to be large enough for a high impedance so as to minimize leakage to vdd for your fundamental frequency (the inductor blocks it but if impedance from your C is low enough, signal will flow to Vdd). couple with your L, the theoretical impedance from your LC tank will be infinite.

Once you've set your C to have a large enough impedance [1/(omega*C)] = Z0, use the formula to find your required L. try to play around with the values to obtain the best results because of the Q factor of your LC tank.

I may be wrong. Someone please point to me if there's something conceptually wrong.

and, yep, i stand firm that you've to work on the two formulae to get the 3 values. However, please let me know if you know something more about the Rp or others may assist (:

natnoraa

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 10^th, 2014, 11:11pm

Thank you very much, natnoraa.

Would anyone please help me about this? I am getting stuck here.

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by aaron_do on Feb 11^th, 2014, 1:15am

Hi baab,

the L and C form your tank. So the resonant frequency is found from ω² = 1/LC.

1) C is made up of two parts. First the parasitic capacitance of your devices and the load. Second is however much additional capacitance you decide to add in parallel with the circuit. Often switchable capacitors are added to critical nodes in order to tune the resonant frequency (especially in a test chip). Otherwise, C should be as small as possible if you want the highest possible gain.

2) For the inductance, L, making it as large as possible while keeping the resonant frequency the same will generally get you the highest gain. You need to study about inductor design, and actually try to design inductors before you will really know the limitations here. But basically Rp = QωL, so the larger the L, the larger the Rp, and the higher your gain.

3) It should be obvious at this point that Rp is just the parasitic resistance of your inductor, but depending on the technology, the output resistance of your transistor might play some part. You don't want to deliberately add a resistor here. Also, your comment about large resistance = high noise is incorrect. you have to consider whether the resistance is in series or shunt to the signal path. If it is in series, then the more resistance, the higher the noise. But if it is in shunt, then the smaller the resistance, the higher the noise.

When I mentioned maximizing L, the goal was to get the highest possible gain. This will give you a nice big signal at the output that is insensitive to the next stage's noise. However, you don't want to saturate your LNA, so depending on your design, you may not want the highest possible gain anyway. Unfortunately, it isn't really possible to design the LNA without knowing what kind of load it is driving (i.e. the mixer).

regards,
Aaron

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 12^th, 2014, 12:20am

Thank you, Aaron, for the insight.

Is there a way to know the value of parasitic capacitance at the output node?
I think we can find the parasitic capacitance of the inductor by simulation it in separation but the total parasitic capacitance is from various devices such as transistors, inductors...

The total C = C (from inductor) + C (from transistors) + ...
I can't figure out how to find out that value.

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by aaron_do on Feb 12^th, 2014, 2:06am

For the device capacitances, you can try reading any analog IC text such as Razavi's CMOS analog IC Design textbook.

regards,
Aaron

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 12^th, 2014, 2:26am

Hi, Aaron.

Did you mean that parasitic capacitance at the output can't be simulated?
I mean that whether we have to read text to know its value.
I think I can find parasitic capacitance of the inductor but to find the parasitc capacitance of transistors at drain seems too complex to me.
I just found the model of transistor in BSIM but it is too complex, there are too many parameters.
Thanks.

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by aaron_do on Feb 12^th, 2014, 7:10pm

Hi baab,

its easy to simulate the output capacitance. I guess the easiest method would be to run an S-parameter simulation, and convert the s-parameters to Y-parameters. For this simulation, you can replace the output inductor with a very large ideal inductor (1 H for example) so that it doesn't affect your result.

regards,
Aaron

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 13^th, 2014, 1:00am

Hello, Aaron.

Thanks. I just saw that in SP analysis, in the Direct Plot Form there is Z parameters, Zp.

I think we can use it (Z22) to compute output capacitance instead of S22. Is that right?

BTW, I followed the method here: http://www.ece.ucsb.edu/yuegroup/Teaching/ECE219Winter2013/Lecture%20slides%20and%20notes/ECE219-Lec3-4-notes-LNA.pdf

However, my S11 is not good at all. It is about -2.1dB. Could you suggest the way to fix it?

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by aaron_do on Feb 13^th, 2014, 1:59am

Hi baab,

if your S11 is not good then you just didn't match the amplifier properly. Use the smith chart to see how you can adjust your values. The smith chart is an extremely useful tool for RF design so you should try and learn it asap.

As for the output capacitance, Y22 is much more appropriate than Z22. I suggest you refer to "RF Circuit Design" by Chris Bowick if you want to understand these network parameters better.

regards,
Aaron

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 13^th, 2014, 2:31am

Thanks, Aaron.

I had the book and I read part of it. I will try to read up tonight.
I am a bit confused about input matching network.
I followed the method at the end of the link below.

http://www.ece.ucsb.edu/yuegroup/Teaching/ECE219Winter2013/Lecture%20slides%20and%20notes/ECE219-Lec3-4-notes-LNA.pdf

As for my understandning, here the "Power-Constrained Simultaneous Noise and Input Matching" technique is used.

Ls and Lg are used to match both noise and power simultaneously.
As in the link I calculated the values of Ls and Lg as in the step 7 and 8.

And indeed S11 has the right curve. Its lowest value is about -2dB at the interest frequency. However, the problem is that it is not good. I expected it is about -10dB.

My question:

1. Ls and Lg here forms an input matching network for both noise and power, right?
2. I simulated and computed the values of Ls and Lg as in the procedure mentioned in the link.
Then I resimulated and get S11 as above.
Does that mean the values Ls and Lg that I found is not good?
I see that it has the correct shape (the lowest S11 is at the interest frequency).

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by aaron_do on Feb 13^th, 2014, 3:02am

Hi baab,

since the lowest point is at the correct frequency, it means that your resonant frequency is correct. But your input resistance is clearly wrong. I haven't looked at the link but I'm guessing it says Rin = wTLs. You probably just used the wrong value for wT in your calculation...

You can use the smith chart to see exactly where you went wrong...

regards,
Aaron

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 14^th, 2014, 1:44am

Hi, Aaron.

Could you take a look at this and tell me where I am wrong or what I should do?
I know that I need to match input and output with the help of Smith Chart but it will be great if I know where I am wrong.

My reference: http://www.ece.ucsb.edu/yuegroup/Teaching/ECE219Winter2013/Lecture%20slides%20and%20notes/ECE219-Lec3-4-notes-LNA.pdf

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 14^th, 2014, 7:36pm

Hi,
I think in the circuit above, Ls and Lg already form the input matching network and we don't need to make another one like L, T or Pi networks.
Is that right?

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by RFICDUDE on Feb 16^th, 2014, 5:04am

Hi Baab,

Looks like you did not recalculate or remeasure Cgs after you scaled the width from 24um to 773um to raise gm from 14mS to 442mS. Cgs is proportional to width, so Cgs will increase by a factor of 32.

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 16^th, 2014, 7:57am

RFICDUDE wrote on Feb 16^th, 2014, 5:04am:

Thanks. However, let's me explain it a bit more.

As in the picture, first I calculated optimum Q for minimum NF.
From Q computed, the total Cgs is determined with the formula:
Cgs = 1/(Omega* Q* 50Ohms)
(Cgs here is the capacitance with minimum NF, after Cgs is calculated I need to resize the width of transistors to get the Cgs value)
And from that Cgs I can figure out the total width of transistors with the formula:

W (final W) = Cgs/(2/3 * Cox* L)

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by RFICDUDE on Feb 16^th, 2014, 11:56am

I guess what was throwing me off is that you have a very large gm for the size of the device, but I missed that you are using a fairly large bias voltage.

My misinterpretation aside ...
The transit frequency is very high and the resulting Ls is unrealistically small to implement.

I have seen papers where Cgs is intentionally made bigger without increasing transistor area by simply placing some additional fixed capacitance across Cgs. This lowers the transit frequency independent of gm and gives you a degree of freedom to use more practical values of Ls for the gate impedance match problem.

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by aaron_do on Feb 16^th, 2014, 6:03pm

Hi baab,

its been a while since I did those analyses, and I suspect they may be inaccurate for such a high gm/Cgs (Your value of Ls is too small to be practical). As I remember, the equations are based on a rather simplified transistor model.

For the impedance matching you are right, you don't need to add an additional matching network. But remember to take into account the gate resistance of the transistor, and Lg's series resistance. As RFICDUDE pointed out, you may want to lower the fT of your device which will lead to a more reasonable value of Ls.

regards,
Aaron

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 17^th, 2014, 12:13am

Thank you. I read about the adding of the additional capacitor. However, it makes the implement more practical. In simulation, my my circuit above should be fine, right?

To be practical, please what is the range of Ls? I just simulated NFmin with Ls swept. As Ls increases, NFmin increases significantly.
With Ls = 10um, NFmin is about 1.99dB at Vgs = 0.6V.

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by aaron_do on Feb 17^th, 2014, 6:27pm

What do you mean by Ls = 10um? As far as I know, a practical value will depend on your implementation and layout.

If you are doing using a down-bond (bondwire) as Ls, then the down-bond inductance would be roughly 0.5 nH. You would also need to take into account the layout routing from the source of the transistor to the bonding pad. This could be 0.1nH for example, but its better to model this. So the total would be roughly 0.6 nH.

If you are using an on-chip Ls, you can make Ls smaller. But you need to take into account how accurately you think you can model Ls (including parasitic inductance).

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by baab on Feb 17^th, 2014, 11:58pm

Hi, Aaron.

Quote:

What do you mean by Ls = 10um?

Sorry for the mistake. I will need to look it up again. I don't remember exactly the value right now.
We have the lower limit for inductance because the parasitic inductance of bondwire, right?

Title: Re: How to choose Rp, L, C for cascode LNA?
Post by aaron_do on Feb 18^th, 2014, 6:51pm

Quote:

We have the lower limit for inductance because the parasitic inductance of bondwire, right?

It depends on your design. If you reference all of your ground's to the transistor source, then the ground downbond won't have any effect. Its easier to do in a differential circuit due to the virtual ground. The short answer is "no", the bondwire inductance doesn't limit the amount of source degeneration. The lower limit is all of the parasitic inductance due to your routing.

Aaron