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Design >> Analog Design >> power consumption of an ADC per sample
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Message started by jovial on Mar 15^th, 2014, 5:39am

Title: power consumption of an ADC per sample
Post by jovial on Mar 15^th, 2014, 5:39am

Hello everyone !!!

How to calculate/estimate the power conversion of an ADC per sample in terms of the parameters like sampling frequency, etc. ???????????

Necessary papers/reference would be helpful.

Title: Re: power consumption of an ADC per sample
Post by aaron_do on Mar 16^th, 2014, 11:10pm

Hi,

it completely depends on architecture. There is an excellent ADC performance survey by Boris Murmann from Stanford. Sorry I don't have the link, but you shouldn't have much trouble finding it...

Aaron

Title: Re: power consumption of an ADC per sample
Post by Johan Dijkhuis on Apr 10^th, 2014, 11:07am

See also http://converterpassion.wordpress.com/
This gives a pretty complete overview. It starts at a few fJ / conversion step, up to about 10 bits. After that it increases. Most very low power medium resolution ADCs are SAR, high resolution is dominated by sigma-delta.
Best Regards,
Johan.