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https://designers-guide.org/forum/YaBB.pl Design >> High-Speed I/O Design >> pll chargepump one to one correspondence between static phase error and ref spur https://designers-guide.org/forum/YaBB.pl?num=1395957957 Message started by yvkrishna on Mar 27th, 2014, 3:05pm |
Title: pll chargepump one to one correspondence between static phase error and ref spur Post by yvkrishna on Mar 27th, 2014, 3:05pm Hi, For chargepump PLLs the presence of up-dn current mismath or leakage from chargepump ouput would cause Reference spur and also static phase error. However is there a strict one to one correspondence between static phase error and Ref. spur magnitude? (which is independent of the cause mismatch/leakage) I see these expressions in many journal papers. The expressions (1) and (2) here look as if the total static phase error estimate is sufficient to calculate the total Ref. spur magnitude. Is my understanding correct?? Thanks, yvkrishna |
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