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Design >> Analog Design >> the conservation of power
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Message started by IanX on Apr 13^th, 2014, 11:30pm

Title: the conservation of power
Post by IanX on Apr 13^th, 2014, 11:30pm

Hello, I did the 'tran analyses' in Cadence(IC6.1.6).
I use two capacitor in parallel , and one terminal with ground. Initial voltage is 5V, 2V cross each capacitor . And plot the node between between. I can see the curve from 5V to almost 0V if the tran stop time is long enough.
Another simulation: The same with previous one besides adding a resistor between two capacitor. I measure two terminal of the resistor. One curve is from 4V and one curve is from 3V. And the final value is almost 0V if the tran stop time is long enough. It is quite strange . I can not understand how it work.

Title: Re: the conservation of power
Post by aaron_do on Apr 14^th, 2014, 2:00am

Hi,

the bottom circuit is physically impossible. A capacitor will always have some resistance and energy will be burnt in it when you start the simulation. In reality there could even be some energy radiated due to the antenna formed by the loop. So the energy at the start of the simulation will be more than that at the end.

I believe that for the simulation, there is a minimum resistance attached from each node to ground, so given enough time, the voltages will eventually settle to 0 V.

regards,
Aaron

Title: Re: the conservation of power
Post by IanX on Apr 15^th, 2014, 1:39am

Thank you.

I think you are right. There is a parameter called gmin, which will decide the resistor connect to each node. The default value is 10e-12. And the capacitor is only 1p in the simulation. And it's quite easy to decrease to 0V.
:)