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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Strange Noise Issue of Passive Swicthed Capcitor Circuit https://designers-guide.org/forum/YaBB.pl?num=1404381752 Message started by sharezhao on Jul 3rd, 2014, 3:02am |
Title: Strange Noise Issue of Passive Swicthed Capcitor Circuit Post by sharezhao on Jul 3rd, 2014, 3:02am Very simple circuit. Suppose only the resistor produce thermal noise. Phi1 lasts mTs. Now want to calculate the Continuous time output Noise PSD. My calculation is as: Devided into two phase, then add together. First during Phi1 The output is continuous time noise produced by resistor. KTRn, then divided by two capacitor. During Phi 2, only the sampled noise, all the PSD are folded back to low frequency. The value is only related to the Cap and Clock frequency. At last, add two together. But the simulation result is different from my calculation. Large than my calculation. I was wondering where is the problem with my calculation? Thank you for your time. |
Title: Re: Strange Noise Issue of Passive Swicthed Capcitor Circuit Post by sharezhao on Jul 3rd, 2014, 6:15am Here is my calculation |
Title: Re: Strange Noise Issue of Passive Swicthed Capcitor Circuit Post by SNIKE on Jul 21st, 2014, 12:36am The noise is 4KT(c1+cl1)/(cl1*cl1). |
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