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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> speeding up mixed-signal simulations https://designers-guide.org/forum/YaBB.pl?num=1405384538 Message started by alirezad on Jul 14th, 2014, 5:35pm |
Title: speeding up mixed-signal simulations Post by alirezad on Jul 14th, 2014, 5:35pm Hi, I am simulating a mixed signal design in virtuoso 6.1.6 with two simulators as follows: 1. Spectre APS simulation of transistor level design 2. AMS simulation using verilog models of digital blocks I am seeing that - quite surprisingly - #1 runs faster than #2. In order to see where the AMS simulator is spending time, I look at the profiler. On the stream count section, the top %hits that I see go to the following streams: ssslib snare support outside engine Method SSS_MT_MINNOW (method) Also the stream type section is topped by "support for VPI callbacks (or UI)." I couldn't find much information on what these mean and what I can do to speed up my sims. I appreciate if anybody can shed some light or point out some references. |
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