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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> effect of pnp in CMOS bandgap https://designers-guide.org/forum/YaBB.pl?num=1405870735 Message started by love_analog on Jul 20th, 2014, 8:38am |
Title: effect of pnp in CMOS bandgap Post by love_analog on Jul 20th, 2014, 8:38am What is the effect of poor pnp in CMOS bandgap in very fine geometry. I believe CMOS pnp have poorer base resistance. Also the Ie is not equal to Ic since base is wide. How does this translate into overall bandgap performance? Does it lead to more tempco. Can it be trimmed out so not an issue? thanks |
Title: Re: effect of pnp in CMOS bandgap Post by RobG on Jul 29th, 2014, 4:15pm I don't think there is anything drastically different. The main effect of high base resistance is that you have to run the device at lower currents so the Ib*Rb drop is negligible. otherwise this IR drop will add curvature to the design which may not be modeled accurately. It also adds a non-ptat error that cannot be easily trimmed out. I don't know why smaller geometries would necessarily make the base "wide." Quite the opposite in fact. |
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