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Design >> Analog Design >> Calibrating a SAR
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Message started by RobG on Aug 6^th, 2014, 2:26pm

Title: Calibrating a SAR
Post by RobG on Aug 6^th, 2014, 2:26pm

OK, it is my turn to be lazy ;D

I'm looking into an 18 bit SAR. No missing codes is the main consideration. Conceptually I know what I need to do to calibrate out the mismatches, but I'm not sure how to implement it. Does anyone have any good references or insight?

Title: Re: Calibrating a SAR
Post by loose-electron on Aug 7^th, 2014, 7:45pm

no missing codes and 18 bits?

How fast is this thing?

Personally if the device can be really slow, I would consider a VCO counter architecture.

Always monotonic, never misses codes and simpler to implement.

Need to be careful about characterizing the noise but thats about it.

Title: Re: Calibrating a SAR
Post by RobG on Aug 7^th, 2014, 9:19pm

loose-electron wrote on Aug 7^th, 2014, 7:45pm:

no missing codes and 18 bits?

How fast is this thing?

Oh, just 1.3 MS/s. That isn't fast is it? :) Unfortunately, it has 32 multiplexed inputs so delta-sigma or counters won't work. The good news is that I can probably interleave several ADCs and not worry about channel mismatch.

TI actually has 18 bit SARs at that speed for only 5mW, but it is probably in 40nm or something.

Title: Re: Calibrating a SAR
Post by RobG on Aug 11^th, 2014, 10:31am

I found this thesis from MIT that seems helpful. It is disappointing that they charge to get a non-secured copy. I hope at least the author gets the lion's share.

Title: Re: Calibrating a SAR
Post by loose-electron on Aug 11^th, 2014, 8:52pm

RobG wrote on Aug 11^th, 2014, 10:31am:

I found this thesis from MIT that seems helpful. It is disappointing that they charge to get a non-secured copy. I hope at least the author gets the lion's share.

generally the author gets nothing for that sort of thing

its not selling a book, there is no money to be made in journal articles or thesis papers

Title: Re: Calibrating a SAR
Post by Lex on Aug 13^th, 2014, 3:07am

Just use another viewer ;)

evince, xpdf seem to work fine for screenshots/text copy

Title: Re: Calibrating a SAR
Post by wandola on Sep 8^th, 2014, 6:50pm

I believe 18-bit SAR ADC is super challenging. You can sell this thing to ADI, or publish ISSCC paper like crazy...

You definitely need to use subranging type and combine 2 10-bit or 10b+9b to realize the 18-bit resolution overall.

Each ADC needs to be calibrated. I think the gain and offset mismatch between the two ADCs also need calibration.

65nm or 40 nm from UMC or tsmc will be a good platform for this kind of design. :D

Title: Re: Calibrating a SAR
Post by loose-electron on Sep 9^th, 2014, 11:05pm

wandola wrote on Sep 8^th, 2014, 6:50pm:

a sub ranging 2 step structure will require the front end to be good to 18 bits or you will lose the accuracy in two step process errors.

this is not going to be easy, the common methods at this rate resolution tend to be oversampling or integrating-counter systems. However that multiplexing requirement may make those methods a show stopper

Title: Re: Calibrating a SAR
Post by boe on Sep 10^th, 2014, 11:53pm

loose-electron wrote on Sep 9^th, 2014, 11:05pm:

...this is not going to be easy, the common methods at this rate resolution tend to be oversampling or integrating-counter systems. However that multiplexing requirement may make those methods a show stopper

RobG, I suggest you look into incremental sigma-delta converters.
- B O E