The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> Bandgap Voltage Reference
https://designers-guide.org/forum/YaBB.pl?num=1419835145

Message started by comicsanms on Dec 28^th, 2014, 10:39pm

Title: Bandgap Voltage Reference
Post by comicsanms on Dec 28^th, 2014, 10:39pm

Hi Designers Good day.

I and my partner are currently having a research about analog devices which is Bandgap Voltage Reference. (see the attached file below) There are various methodology that can be use in sizing of MOSFET transistors but in our case we can't apply it in our circuit which is the gm/id methodology. Why? Because while we are gathering lectures, notes, information and etc about the methodology we have chosen, we notice that the information inside those materials are not that complete, i mean there are not enough information that can describe how the methodology works. Is there anyone who can give us advice, websites,reference or maybe an online lecture about our topic. THANK YOU SO MUCH AND HAVE A GREAT DAY. Actually we are still rookie in this field so please bare with us :) ;D

Title: Re: Bandgap Voltage Reference
Post by loose-electron on Dec 29^th, 2014, 7:10pm

Google is your friend. Also it is in many textbooks, and papers in the IEEE JSSC

Research time, and that doesn't mean asking on a web forum.

Let us know when you have some more specific questions.

Title: Re: Bandgap Voltage Reference
Post by comicsanms on Dec 30^th, 2014, 7:32am

i'm really sorry for the term i used which is "research". Actually we are having our thesis right now that's why i seek some help from the experts on this field. :) Sir/Ma'am if you have references that you can recommend to us, it will be a big help :)

Title: Re: Bandgap Voltage Reference
Post by loose-electron on Dec 30^th, 2014, 1:08pm

there is over 1 million Google hits on this topic, many papers in the IEEE JSSC, and pretty much every textbook that is on IC design covers the subject.

if you want useful information you got to ask more specific questions.

Please!

Title: Re: Bandgap Voltage Reference
Post by comicsanms on Dec 31^st, 2014, 1:40am

Well then, my first question, is there anyone here in this forum that can explain to me in a very understandable explanation the gm/id methodology. Because I almost scanned and read many references about that methodology at the end all the information I gained in gathering information about this methodology was mixed-up in my head. That's why I seek some references that can explain in a good way the methodology all about.

My second question is, is there anyone here knows about the Bandgap Voltage Reference? If yes, can you give me also some information that can be easy to understand as mush as possible. :) Thanks guys. Have a good day. ;D ;D ;D ;D

Title: Re: Bandgap Voltage Reference
Post by Novaris on Dec 31^st, 2014, 7:07pm

Hi,

There is a whole book out there covering the gm/id appraoch. Basically it means using a SPICE simulator to create characteristic curves of a few basic W/L ratios and using these curves to define the operating point by choosing V* and selecting the desired gm and ft.

I recommend reading through it or searching the cadence sourcelink or this forum. This question is rather frequently asked.

As for the bandgap circuit you showed:
First of all I'm not sure you can call it a real bandgap if there is no bipolar device used. I saw in your schematic that you use a deltaVTH over a resistor and 2*VTH over a resistor to produce what is normally called a PTAT and CTAT current, they are mixed together and create a voltage drop over another resistor. By choosinh the correct factor of the currents you can achieve around 100ppm/K. But thresholds don't match and are much more process dependent. Also they only vary with roughly -1.8mV/K instead pf 2.

The gm/id approach does not really help here to get the DC point correct. Its much more about calculating the derivative of the currents over temperature and mix the with the factors to achieve ideally zero. second order effects like hot carrier or backgate will then lead to the 100ppm/K box model.

The gm/id is then needed if you want to achieve low noise. Rule of thumb: higher current means higher noise. large gm means higher noise. Use long transistors. Use low gm/id and high V* for the current mirrors. VDD headroom and variation is here the limiting parameter. Design the startup circuit with care and simulate both dc swep startup as well as transient fast and transient slow ramp to see startup time. The longer the transistors the longer the time.

The startup circuit you use is basically a very long transistor woth a gate to vdd and a current source from the PTAT generator which is stronger then the resistor when active and an inverter acting as comparator. This is sufficient but you have to ensure that the current from the pmos is everytime larger than the current flowing through the nmos with a vgs of vdd. Both vary with process!

BR

Title: Re: Bandgap Voltage Reference
Post by Novaris on Dec 31^st, 2014, 7:37pm

Here is the book by Paul Jespers:
http://www.amazon.com/Methodology-sizing-low-voltage-analog-Circuits/dp/0387471006

Title: Re: Bandgap Voltage Reference
Post by comicsanms on Jan 1^st, 2015, 1:59am

Thanks NOVARIS.

Well for your comment in the circuit that I attached for Bandgap, at first when we our still gathering information and comparing different circuits of a bandgap we consider many factors in choosing that circuit. We found out that as much as possible we need to use or find a bandgap circuit which composed of ALL CMOS. (as you can see in the circuit) At first we didn't plan to find an ALL CMOS bandgap circuit, b'coz, as we observed many researchers in bandgap used bipolar so we decide to used a circuit which have bipolar, but at the end we accidentally found a circuit which have all cmos. And we consider the fact that it is recommended to use all CMOS in a bandgap.

And then we decide to used that circuit but in many papers and information I have now the authors/researchers never explain the importance of a bipolar and the difference of bandgap circuit that having a bipolar compare to bandgap circuit without bipolar. That's why I'm still confused of the importance of the BJT in a bandgap circuit. Do you have any idea about this fact?

Anyway thanks for the reference you gave it to me. :D :D :D :D

Title: Re: Bandgap Voltage Reference
Post by Novaris on Jan 1^st, 2015, 3:49am

As far as I can remember (I did not check for references now) most designers tend to use bipolar deviced because the base emitter voltage variation over temperature is much more controllable and more doping independend than a threshold of a MOS device.

Also, when it comes to deltaVBE, for bipolar devices the derivative is k/e * ln(N) (where N is the relation bipolars. e.g. 2 bipolars on the left without a resistor, 8 on the right with a resistor below gives a N of 4). For MOS devices there are all these nasty second order effects which kill the bandgap at high temperature.

If you want to design this circuit you still have to have the NMOS of the crossed mirror above the resistor in saturation and make more unit transistors on the right to allow a voltage drop on the resistor itself. But since the drain-source voltage of the NMOS devices will never be the same if you dont cascode it you will have length modulation killing the performance. If you make it long you need a high VDD.

In Total: The reference you have here is the noisiest I can think off. And I fear also one of the more inaccurate ones since you have at least 3 mismatch sources. The three resistors forming currents and voltage drops, the CTAT current mirror and the PTAT current mirror. Typical bandgaps at least get rid of the CTAT.

Title: Re: Bandgap Voltage Reference
Post by Eliot on Jan 1^st, 2015, 5:34pm

Hi Novaris,

I'm one of the members of comicsanms.
First of all thank you for helping us giving information. It's really a helpful one. I just wanna ask if this schematic can still be used? because the reason why we are having a difficulty in changing our schematic is first, if we used a bipolar transistor we will have a difficulty in layout because bipolar is a complex one. So our adviser said we need to find a all cmos application of this one. Second, because of our tool we are currently using, the electric VLSI and LTspice. Third, if we must change our topology we will have a difficulty in choosing BVR because there are so many papers that they use different topology but we see a paper that implemented an all cmos BVR(just click the file) but they use an opamp instead of a current mirror..any suggestion..thanks a lot you've been a great help to us.

Title: Re: Bandgap Voltage Reference
Post by Novaris on Jan 1^st, 2015, 6:14pm

Of course your schematic is valid. But I thought that the question was whether there is information on how to apply the gm/id approach to it? I think there are as many bandgap variants out there as there are references...stacked bandgaps, all CMOS references, half-bandgaps as the ones in your paper... It all depends on your target specification and available process.

For example: If you are lucky enough to work with a process which allows two nwells your crossed mirror struckture will never suffer from backgate effects since you can place them in a seperate well potential. Most analog (large) processes like 0.8um, 0.18 and 0.12 contain primitive bipolar devices even though they are CMOS processes. The bipolars are built as parasitiv lateral or veritcal PNPs and only allowed in one or two different sizes with special DRC requirements.

If you have 5V available you can also cascade the hell out of your schematic since you have the headroom available to do so. If we are talking about a 1.8V design it would still be possible by using weak inversion cascodes and low voltage headroom cascoding (although this means spending a few nano-amps additional IDD). If the design shoud be a half bandgap operating at 600mV and a nominal VDD of 1V then a locked mirror approch won't even work accurately over process variation.

Long story short: what would be the requirements?

Title: Re: Bandgap Voltage Reference
Post by Eliot on Jan 2^nd, 2015, 7:54am

Hi Novaris

This thesis we are currently work on is applying this to 45nm technology and we are currently having a difficult time in sizing the transistors.

Our requirements for this is to supply a constant voltage of 0.65V with a supply voltage of 1V and an accuracy that is depend on how we will get the result. In getting the sizes for the transistor we use the gm/id approach.
We cannot define the temperature coefficient because we are having a difficult time in simulating the circuit with respect to temperature. In our simulation tool(LTspice) which is scad3 ,we are facing problems on getting a SPICE code for temperature variation.

I just wanna ask if how we will use the gm/id because i read some of the gm/id related topics and they have always an input AC signal and a given gain, as for our schematic we don't have set frequency, gain and everything that is related to AC analysis. Because as I saw in our circuit we are working on DC analysis and no AC matter..

Thanks

Title: Re: Bandgap Voltage Reference
Post by Novaris on Jan 2^nd, 2015, 8:42am

Thats why I stated before that the gm/id method is not really suitable for bandgap references when it comes to getting the temperature behavior correct. It is much more a topic of assuming all transistors to be ideal mirrors and calculating the derivatives over temperature to get the factors (as stated in your paper).

The gm/id method will although help you to get an idea about other characteristics of your circuit like startup time, noise, regulation accuracy (open loop gain of cross coupled mirrors), output impedance and voltage headroom. The last one is actually the V* you choose in the gm/id approach.

Also a little reminder here: when working on such low voltages transistors tend to slip into weak inversion operation and most models dont represent this region correctly. As far as I know only the latest BSIMs and HSIMs models (surface based) can model the transition between modes of operation correctly. The influences simulation accuracy! Also weak inversion transistors do not match as accurate as a transistor in saturation with the same size.

For a 1V design I would recommend low voltage cascoding with weak inversion cascodes (does not matter if they dont match), strong inversion (gm/id very low) for the cross coupled mirror and spend also some area for resistor matching. When you plan for layout, there are two rules: common centroid and same current direction.

Title: Re: Bandgap Voltage Reference
Post by Eliot on Jan 3^rd, 2015, 4:33am

About the specification and the process technology we were using, we are currently confuse about it. We already define the technology we are currently using(45nm process technology) so no problem about that.

My only concern and confuse right now is our specification. In our specs,
0.65V - output voltage
1V - supply voltage
N/A - accuracy
N/A - TC(temperature coefficient)
required Iptat
required Ictat
Resistors R1 R2 R3

In this specs i just wanna ask if we are the one who will set the value for the required current of PTAT and CTAT and also the resistors.
Im having problems regarding with this one because as you can see we set a 0.65V Vref wherein if we will use ohms law Vref = R3(IR3)
where the current in IR3 is current of PTAT + CTAT where im still also confused.
Because on other papers like this 2 file that I will show to you have different equation in solving it..

Title: Re: Bandgap Voltage Reference
Post by Eliot on Jan 3^rd, 2015, 4:34am

This is the other one.

Title: Re: Bandgap Voltage Reference
Post by Novaris on Jan 3^rd, 2015, 9:14am

Ok i got a little lost now, what is your question?

Title: Re: Bandgap Voltage Reference
Post by loose-electron on Jan 3^rd, 2015, 2:49pm

The use of PN junctions to define a bandgap reference is done because the consistence of the voltage difference between two PN junctions of different geometric size and common current is extremely accurate.

Notice that I say "difference between two PN junctions".

If you go do the math on it you will see that all the process variance falls out of the equation and thus makes for a very accurate reference. That is with both PN junctions on the same piece of silicon.

Not the case with MOS threshold voltages. MOS threshold variance is much much worse.

Bandgaps on CMOS processes are generally done with the PN junctions that are available on the silicon.

Ask good questions and you will get good answers.

Title: Re: Bandgap Voltage Reference
Post by Eliot on Jan 5^th, 2015, 12:20am

Hi Novaris

If gm/id approach is not suitable to BGR, is there any other way to size the MOS transistors more accurately besides square law model approach?

Title: Re: Bandgap Voltage Reference
Post by loose-electron on Jan 5^th, 2015, 12:36am

Eliot wrote on Jan 3^rd, 2015, 4:34am:

This is the other one.

That device totally ignores threshold variance, which is very significant.
Also, no silicon was evaluated just simulations.

Title: Re: Bandgap Voltage Reference
Post by Novaris on Jan 5^th, 2015, 5:46am

To be honest I can't think of a better way to calculate the MOS transistor sizes, at least for temperature variation.

Title: Re: Bandgap Voltage Reference
Post by loose-electron on Jan 5^th, 2015, 11:52am

Novaris wrote on Jan 5^th, 2015, 5:46am:

To be honest I can't think of a better way to calculate the MOS transistor sizes, at least for temperature variation.

That is not the thing I have a problem with. Vth has a huge amount of variance in it, and also a large amount of variance from device to device on the same piece of silicon. In the real world that will kill the design.

That is the reason that the majority of bandgaps are done using PN junction ratios.

In the real world.

In academia? It depends on the professor, if they got no real world experience you might be able to pull it off, but if you hear the phrase "have you considered...." then you are dead.

Title: Re: Bandgap Voltage Reference
Post by Novaris on Jan 5^th, 2015, 12:05pm

I know and all references I made over the years were all based on bipolar devices.

But you may come accross a low power application for example for a power on reset were you can actually use a weak inversion based reference. These circuits do not have a high accuracy requirement when it comes to noise and you maybe can even live with the spread of the por-level.

I read a few articles about such references which also contained measurement data so it is 'possible'. But to use such a reference for an accurate application? No.

Title: Re: Bandgap Voltage Reference
Post by RobG on Jan 6^th, 2015, 8:03am

loose-electron wrote on Jan 3^rd, 2015, 2:49pm:

Good info. I will add that the temperature variation due to process variations in the bipolar and the resistors and also some mismatches can be eliminated by trimming the output to a known voltage at a pre-determined temperature of moderate accuracy. In other words, bipolar references can handle process variations easier than other types.

With a CMOS reference the VT variation messes things up and you require measurements at multiple temperatures to trim out the temp-co. I will leave it as a research project for the interested parties to figure out why this is :D.

The classic paper on bipolar BGRs was written by Brokaw. It provides a good understanding of the fundamentals. Rincon has also published more state-of-the-art papers. Vittoz published an all mos reference quite a long time ago. These are essential readings.

Also research Makinwa's work. He uses an alternative to all cmos and bipolar, but I don't know much about it.

When you find things out please update us. I have never been a fan of the CMOS references on the assumption that process variations are too hard to deal with, but I have never done an in-depth investigation.