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Design >> Analog Design >> Low Dropout Voltage Regulator Circuit Design
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Message started by Crow on Jan 4^th, 2015, 7:39am

Title: Low Dropout Voltage Regulator Circuit Design
Post by Crow on Jan 4^th, 2015, 7:39am

Good day. :) I was hoping that you would be able to help me understand some of the values in these formulas i came across. We're designing an LDO for the first time (please help :-[ ). These are some of the formulas used for the first two stages of the circuit.
I was wondering, how does one get the values for K'5, K'3, K'1, Vin(max), VT1(min), VT1(max) and for the different lambda?
And perhaps the 1, 3 and 5 indicates the number of the certain transistor in the design? These formulas are for the OpAmp part of the LDO.
Thank you for your help ;D

Title: Re: Low Dropout Voltage Regulator Circuit Design
Post by loose-electron on Jan 19^th, 2015, 1:22pm

your question is not understandable in the form presented. Schematics, diagrams of where all this is in the system would be needed as part of the question.

Title: Re: Low Dropout Voltage Regulator Circuit Design
Post by raja.cedt on Jan 19^th, 2015, 4:39pm

I guess these formulas are from allen holberg book, so you find there only.
you could have show schematic at least....