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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> ground pin between high-speed signal pins? https://designers-guide.org/forum/YaBB.pl?num=1423265601 Message started by carlgrace on Feb 6th, 2015, 3:33pm |
Title: ground pin between high-speed signal pins? Post by carlgrace on Feb 6th, 2015, 3:33pm Hi all, I'm taping out a chip with a high-speed serializer on it in about a month. In a meeting with the team designing the package, they requested I put a ground pad between the P and N pads of the differential high-speed digital output. They asked for this because otherwise different lengths of bondwire would need to be used. (the pads on the die or in-line, but the landing pads on the package side are staggered). Anyway, this makes me feel a little uneasy since the two differential outputs will not be adjacent pads on the die. I have two options: 1. Put a ground between the P and N of the Tx outputs. So the five pads would look like this. GND TX_N GND TX_P GND 2. Alternatively, I could just remove the GND pad in the middle and leave the dimensions the same, so it would look like this: GND TX_N TX_P GND This way the package designer is happy but I don't have a ground between signals. I've simulated both schemes and I don't really see much of a difference in the simulation. Which approach (1 or 2) do you suggest? Am I missing any gotchas? |
Title: Re: ground pin between high-speed signal pins? Post by RobG on Feb 9th, 2015, 4:09pm #2 makes the most sense to me, but I've never had occasion to test it. In theory the fields should cancel at the centerline anyway. Are they trying to kill the load from Miller effect between the two wires? Putting a middle wire just increases the coupling, unless the wire is infinitely thin. In that case it is just a tie. |
Title: Re: ground pin between high-speed signal pins? Post by carlgrace on Feb 10th, 2015, 4:55pm RobG wrote on Feb 9th, 2015, 4:09pm:
Thanks Rob. The package designer wasn't advocating this. I have the room in my padring so I was trying to decide the best thing to do. We had a phone call this morning and the package designer agrees with you. So #2 it is. Thanks for the help. Interestingly, I extracted the pads, put in bondwire models, and so on and couldn't get a significant difference in the two approaches from a performance standpoint. My thinking is that it just doesn't matter that much, but avoiding having the parallel ground bondwire in the package cavity is probably the right thing. |
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