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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Question regarding a sawtooth circuit https://designers-guide.org/forum/YaBB.pl?num=1432630070 Message started by AMSA on May 26th, 2015, 1:47am |
Title: Re: Question regarding a sawtooth circuit Post by RobG on May 26th, 2015, 6:57pm That isn't how I've seen it operate. The NMOS is supposed to be a switch that turns on when the voltage ramps to Vh. The switch completely discharged the capacitor, but you need a delay in there so the capacitor is completely discharged before the comparator turns the switch back off. That way it will ramp up until it gets to Vh, then it will discharge completely very quickly and the start ramping up again. To ramp up and down would take another threshold and a way to change the polarity of the current, as you had guessed. |
Title: Re: Question regarding a sawtooth circuit Post by AMSA on May 27th, 2015, 10:02am Hi RobG. Thanks for the reply. How I could implement that delay? Do you have any reference on this? By the way, if you notice, the NMOS turns on when the ramp hits the VH. Right? |
Title: Re: Question regarding a sawtooth circuit Post by RobG on May 27th, 2015, 11:18am The Johns and Martin text has a similar circuit under CMOS relaxation oscillators. The delay is just an inverter string between the comparator and NMOS. Yes, the NMOS turns on when the ramp hits VH. It will stay on until the comparator goes low, which is why you need the delay, otherwise it will not complete discharge, or maybe even maintain the voltage at VH like a unity gain buffer since the feedback is negative. |
Title: Re: Question regarding a sawtooth circuit Post by AMSA on May 27th, 2015, 11:48am Hi RobG. Thank you for your quicl reply. I see. It is what I though. Well, the detail here, regarding the fact that the sawtooth doesn't reach 0V when discharging is what was confusing me. I though that he didn't reach 0V due to the Vth of the switch. So it has nothing to do with that. Right? Well, I though that the ramp started to charge again because the NMOS switch has switched of because the driving signal was below Vth. I will try on a minute the delay. This will change the frequency of the sawtooth waveform. But tell me another thing. If I add the delay, how the sawtooth will discharge quickly if the driving signal of the NMOS switch will be ON for longer time? Hmmm, being ON for a longer time will give time to the sawtooth discharge quickly? Regards. |
Title: Re: Question regarding a sawtooth circuit Post by RobG on May 27th, 2015, 12:26pm I'm guessing it doesn't go down to zero because the IR drop across the NMOS switch. You can make that bigger and also put an PMOS switch in series with the current source to turn it off. |
Title: Re: Question regarding a sawtooth circuit Post by RobG on May 27th, 2015, 1:36pm I meant a PMOS switch in series with the current source - you want to turn it off when the NMOS switch is discharging the cap. I don't know what else is going on - I think you understand the principle so you'll have to ask yourself "how is it supposed to work?" and then figure out why it isn't working that way ;) |
Title: Re: Question regarding a sawtooth circuit Post by AMSA on May 27th, 2015, 1:51pm Yeah, sure ;) Thanks for the help. Regarding the PMOS, I tried that, but the sawtooth waveform went crazy. Allow me to add one more thing. It make sense to say that it might be good to not start at 0V because the next block will be a comparator which will compare this signal with a error voltage. So, one can say actually that the sawtooth must be within the comparator input range right? |
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