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Simulators >> RF Simulators >> Phase noise for a ring oscillator
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Message started by Naga Kishan on Aug 19^th, 2015, 12:26pm

Title: Phase noise for a ring oscillator
Post by Naga Kishan on Aug 19^th, 2015, 12:26pm

Hi,

I am new in calculating phase noise of a CMOS inverter ring oscillator with 6.24GHz to generate 3.12GHz, 25% duty cycle output using CML divider and AND gate setup. Can anyone help me how to select tstab value, maximum sidebands, no: of harmonics and output frequency sweep range with points per decade. As the phase noise result that i obtained shows -30db roll off till 1MHz and very low phase noise of -60dBc/Hz. is it the correct way?

Title: Re: Phase noise for a ring oscillator
Post by Naga Kishan on Aug 21^st, 2015, 9:04am

Is there no one who knows the concept. I am a new student with having issues to simulate a basic free running ring oscillator to achieve good phase noise and have problems with PSS/Pnoise analysis setup. Could anyone?

Thanks

Naga