The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> design of opamp in subthreshold region
https://designers-guide.org/forum/YaBB.pl?num=1440497652

Message started by JOHN35 on Aug 25^th, 2015, 3:14am

Title: design of opamp in subthreshold region
Post by JOHN35 on Aug 25^th, 2015, 3:14am

hi
i'm designing two stage opamp in subthreshold region. and i need to design a subtractor circuit.

i have observed the gain of my opamp is 58dB. phase margin is 60degrees. i'm designing in 65nm technology(umc).
my power supply is 800mv. biasing current is 200nA.

when i'm using this opamp as a subtractor circuit i'm facing few problems.

if vnoninvrting=1mv vinv=0mv vout=580uv (expected is 1mv as my closed loop gain is 1)
vnoninv=100mv vinv=99mv vout=650uv i'm not getting linear gain also

could you please help me in this issue. and also i have choosen transistor aspect ratios based on some intusion. i didn't get any material or reference to design the opamp in subthreshold region.

thanks in advance

Title: Re: design of opamp in subthreshold region
Post by Tako on Aug 25^th, 2015, 4:06am

Maybe offset is the issue. Have you measured it?

To clarify: you have a single power supply vdd = 800 mV. You give vnoninv, vinv and vout values with respect to ground. Is that true?

I would not expect to operate ideally when you are close to ground or vdd.

Title: Re: design of opamp in subthreshold region
Post by DesertFox on Aug 25^th, 2015, 9:29am

What frequency are you operating at? The gain will drop if you choose a frequency which is more than the 3dB frequency of the closed loop amplifier.