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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> How does this circuit start up? D flip flops for phase frequency detection https://designers-guide.org/forum/YaBB.pl?num=1442375313 Message started by Rosh on Sep 15th, 2015, 8:48pm |
Title: How does this circuit start up? D flip flops for phase frequency detection Post by Rosh on Sep 15th, 2015, 8:48pm This is a CMOS D Flip flop courtesy Razavi. ![]() The circuit is made up of NOR gates. But if you try to work out by pen and paper when Reset is 0 and CK is 1 you will find you can't really find out what Q is. Does this circuit need some additional star-up circuitry? ![]() Update : If I combine two of these circuits in the form of a phase frequency detector as shown below, the circuit works correctly. How is this happening? |
Title: Re: How does this circuit start up? D flip flops for phase frequency detection Post by AnilReddy on Sep 15th, 2015, 10:29pm Hi, somehow, i couldn't able to see those images. can you please check. Bye |
Title: Re: How does this circuit start up? D flip flops for phase frequency detection Post by Rosh on Sep 15th, 2015, 10:37pm @AnilReddy How about now? |
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