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https://designers-guide.org/forum/YaBB.pl Other CAD Tools >> Physical Verification, Extraction and Analysis >> High Voltage NMOS in AMS h35 process https://designers-guide.org/forum/YaBB.pl?num=1443124400 Message started by preethip on Sep 24th, 2015, 12:53pm |
Title: High Voltage NMOS in AMS h35 process Post by preethip on Sep 24th, 2015, 12:53pm Hi all, I am using the high voltage NMOS (nmosi120m) from the ams h35 process in my circuit. i am currently doing the layout. I was not sure about the connections to the RPTUB isolation around the DNTUB of this NMOS. Also, the ams document says that I should connect the source and bulk together using metal1. But when I do LVS, I get an error that says vdd is shorted with another net. But I have made exactly the same connections as in my schematic. I was wondering that I could making some silly blunder with respect to connections to the high voltage NMOS. Has anybody worked with this design kit and in particular , the high voltage NMOS from this PDK before? Any help will be appreciated. thanks |
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