The Designer's Guide Community Forum https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> Clock data Recovery(CDR) based PLL https://designers-guide.org/forum/YaBB.pl?num=1445426408 Message started by Gp on Oct 21st, 2015, 4:20am

Title: Clock data Recovery(CDR) based PLL Post by Gp on Oct 21st, 2015, 4:20am Hello, >I want to basic Idea about clock data recovery. >I have already design PLL.But I don't know how to clock recover from PLL. >I tried  to PLL with Hodge phase detector but how to show the clock (phase allign) from the VCO to Phase detector? suppose I want to 0,45,90,135 degree phase from VCO to phase detector,than how possible?

Title: Re: Clock data Recovery(CDR) based PLL Post by loose-electron on Oct 21st, 2015, 5:17pm ring oscillator - come off different elements in the ring oscillator LC oscillator - create higher frequency than desired clock, use logic to select edge phase relationship

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