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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> Why do we have stability issues as the frequency of operation increases? https://designers-guide.org/forum/YaBB.pl?num=1453921954 Message started by Venky_analog on Jan 27th, 2016, 11:12am |
Title: Why do we have stability issues as the frequency of operation increases? Post by Venky_analog on Jan 27th, 2016, 11:12am I read somewhere that we can have stability issues in basic CMOS open-loop circuits because of parasitic coupling between the input and output. My questions is why does it happen only in high frequency circuits such as RF/mm-Wave circuits? Is it because when we design the circuit to have high gain at higher frequencies, because of coupling from output to input there is a positive feedback with loop gain > 1? |
Title: Re: Why do we have stability issues as the frequency of operation increases? Post by loose-electron on Jan 27th, 2016, 11:10pm The higher the frequency the lower the impedance for the parasitic capacitance. Not terribly difficult... |
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