The Designer's Guide Community Forum https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Problem in simulating 4-stage ring oscillator https://designers-guide.org/forum/YaBB.pl?num=1455678146 Message started by ArtBen on Feb 16th, 2016, 7:02pm

Title: Problem in simulating 4-stage ring oscillator Post by ArtBen on Feb 16th, 2016, 7:02pm Hi everyone. I have a question in simulating 4-stage ring oscillator. I try to simulate as the attachment shown below. And I also set the initial condition of either cross line in the chain. It seems that my oscillator does not oscillate. The single stage is built by full differential amplifier. The gain and phase margin is good. So if is there someone can help me find out where the problem comes. Thank you.

Title: Re: Problem in simulating 4-stage ring oscillator Post by ULPAnalog on Feb 16th, 2016, 7:26pm Which one of those nets is net6?

Title: Re: Problem in simulating 4-stage ring oscillator Post by ArtBen on Feb 16th, 2016, 7:35pm ULPAnalog wrote on Feb 16th, 2016, 7:26pm: Which one of those nets is net6? net6 is the bottom line of my chain oscillator. Which connects first stage input_nega and last stage output_posi.

Title: Re: Problem in simulating 4-stage ring oscillator Post by raja.cedt on Feb 17th, 2016, 2:24am Hello- Looks like problem with the design rather simulation. Just to make sure no issue with the initial condition, apply a 10mv power supply step on the actual vdc or add a pulse current at the o/p of the first stage. In case if it didn't oscillate with the above stimulus, probably you will have to check how much gain you have in the cell, if it is too low (> 1.414 at the frequency of interest) you have to increase the gain. Few observations based on your plots: 1------In the operating point (first fig), you could see input voltage around 0.9, where as in transient it has settled to 1.7 (close to vdd) which doesn't make sense to me. 2------you should have ran simulation for few micro-seconds, because there may be some startup delay as well. That's why it's always better to run PSS which will tell you clearly. Best regards, Raj.

Title: Re: Problem in simulating 4-stage ring oscillator Post by ArtBen on Feb 17th, 2016, 8:09am raja.cedt wrote on Feb 17th, 2016, 2:24am: Hello- Looks like problem with the design rather simulation. Just to make sure no issue with the initial condition, apply a 10mv power supply step on the actual vdc or add a pulse current at the o/p of the first stage. In case if it didn't oscillate with the above stimulus, probably you will have to check how much gain you have in the cell, if it is too low (> 1.414 at the frequency of interest) you have to increase the gain. Few observations based on your plots: 1------In the operating point (first fig), you could see input voltage around 0.9, where as in transient it has settled to 1.7 (close to vdd) which doesn't make sense to me. 2------you should have ran simulation for few micro-seconds, because there may be some startup delay as well. That's why it's always better to run PSS which will tell you clearly. Best regards, Raj. Thank you for your answer. So do you mean during my transient simulation, the amplifier may not work at a high gain region such that may lose the gain and cannot oscillate?

Title: Re: Problem in simulating 4-stage ring oscillator Post by raja.cedt on Feb 17th, 2016, 9:15am Hello--yes that could be reason if it doesn't oscillate with the supply ramp!

Title: Re: Problem in simulating 4-stage ring oscillator Post by ArtBen on Feb 17th, 2016, 9:36am raja.cedt wrote on Feb 17th, 2016, 9:15am: Hello--yes that could be reason if it doesn't oscillate with the supply ramp! OK, thank you. I'll try later.

Title: Re: Problem in simulating 4-stage ring oscillator Post by loose-electron on Feb 17th, 2016, 10:52pm introduce either some noise or some offset in the loop and it should start to go. The classic three inverters connected in a circle will sit at 50% of power and do nothing. Also, you said 4 stages? Your typical 2 stage or 4 stage device will perform like a SR latch.

Title: Re: Problem in simulating 4-stage ring oscillator Post by raja.cedt on Feb 18th, 2016, 4:13am Hi loose-electron-- but he had an inversion in the last stage, it shouldn't behave like a latch. Please correct me if am wrong. best regards, Raj.

Title: Re: Problem in simulating 4-stage ring oscillator Post by loose-electron on Feb 18th, 2016, 11:48am raja.cedt wrote on Feb 18th, 2016, 4:13am: Hi loose-electron-- but he had an inversion in the last stage, it shouldn't behave like a latch. Please correct me if am wrong. best regards, Raj. Something I don't do. I would go 3 or 5 and keep them all exactly symmetric and operating in the same manner. Why? minimal chance of asymmetric behavior. Ring oscillators are fussy little beasts and any idiot can make them run, but getting them exactly balanced and perfectly phase equal requires a lot of tender loving care. Getting their inherent phase jitter down has it's own set of challenges.

Title: Re: Problem in simulating 4-stage ring oscillator Post by ArtBen on Feb 27th, 2016, 1:31pm Thank you for your answer. After asking my friend, I don't think the gain may cause the problem. Since last time my friend use a differential amplifier only 5dB gain with same structure, it oscillated well. But today when I ask him, he tries to simulate again. It fails like I did before. He forgets how he set up last year. So right now I'm confused whether my setup is wrong instead of the design. loose-electron wrote on Feb 18th, 2016, 11:48am: raja.cedt wrote on Feb 18th, 2016, 4:13am: Hi loose-electron-- but he had an inversion in the last stage, it shouldn't behave like a latch. Please correct me if am wrong. best regards, Raj. Something I don't do. I would go 3 or 5 and keep them all exactly symmetric and operating in the same manner. Why? minimal chance of asymmetric behavior. Ring oscillators are fussy little beasts and any idiot can make them run, but getting them exactly balanced and perfectly phase equal requires a lot of tender loving care. Getting their inherent phase jitter down has it's own set of challenges.

Title: Re: Problem in simulating 4-stage ring oscillator Post by ArtBen on Feb 27th, 2016, 1:33pm I also try this method, failed :'(    I did connect my last two stages as non-inverter. That's wired. :( loose-electron wrote on Feb 17th, 2016, 10:52pm: introduce either some noise or some offset in the loop and it should start to go. The classic three inverters connected in a circle will sit at 50% of power and do nothing. Also, you said 4 stages? Your typical 2 stage or 4 stage device will perform like a SR latch.

Title: Re: Problem in simulating 4-stage ring oscillator Post by raja.cedt on Feb 27th, 2016, 2:21pm Hello--based on your description, it is a clear design problem. There is single test bench setup for oscillator simulation. Or please post the buffer, setup schematics. Did you check gain as I suggested, according to simple calculation >3dB gain is suffices for oscillations in theory, so I would think 5dB is some where close to be the practice number. Best regards, Raj!!

Title: Re: Problem in simulating 4-stage ring oscillator Post by ArtBen on Feb 29th, 2016, 7:48am I try to set my input common mode such that my output common mode is 1.75V, and the small signal gain is 6.5dB, more than the practice number as you mention 5dB. So I have no idea where maybe the problem causes :( raja.cedt wrote on Feb 27th, 2016, 2:21pm: Hello--based on your description, it is a clear design problem. There is single test bench setup for oscillator simulation. Or please post the buffer, setup schematics. Did you check gain as I suggested, according to simple calculation >3dB gain is suffices for oscillations in theory, so I would think 5dB is some where close to be the practice number. Best regards, Raj!!

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